M. Thornton

发表

Low power floating-point multiplication and squaring units with shared circuitry

Jason Moore, Mitchell A. Thornton, David W. Matula, 2013, 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS).

A low power radix-4 dual recoded integer squaring implementation for use in design of application specific arithmetic circuits

D. Matula, M. Thornton, J. Moore, 2008, 2008 42nd Asilomar Conference on Signals, Systems and Computers.

Fixed Polarity Pascal Transforms with Symbolic Computer Algebra Applications

Kaitlin N. Smith, Mitchell A. Thornton, M. Thornton, 2019, 2019 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM).

System Probability Distribution Modeling Using MDDs

Stephen A. Szygenda, Shinobu Nagayama, Theodore W. Manikas, 2014, 2014 IEEE 44th International Symposium on Multiple-Valued Logic.

Partially Redundant Logic Detection Using Symbolic Equivalence Checking in Reversible and Irreversible Logic Circuits

D. Michael Miller, Mitchell A. Thornton, David Y. Feinstein, 2008, 2008 Design, Automation and Test in Europe.

ESOP-based Toffoli Gate Cascade Generation

M. Thornton, K. Fazel, J. Rice, 2007, 2007 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing.

QMDD Minimization Using Sifting for Variable Reordering

D. Michael Miller, Mitchell A. Thornton, David Y. Feinstein, 2007, J. Multiple Valued Log. Soft Comput..

Introduction to Logic Synthesis using Verilog HDL

Mitchell A. Thornton, Robert B. Reese, M. Thornton, 2006, Synthesis Lectures on Digital Circuits and Systems.

Arithmetic logic circuits using self-timed bit level dataflow and early evaluation

Mitchell A. Thornton, Cherrice Traver, Robert B. Reese, 2001, Proceedings 2001 IEEE International Conference on Computer Design: VLSI in Computers and Processors. ICCD 2001.

Performance Enhancement Techniques for Phased Logic Circuits Performance Enhancement Techniques for Phased Logic Circuits

D. Matula, M. Thornton, K. Fazel, 2022 .

Research Results in Equivalence Checking

M. Thornton, 2003 .

Combining Simulation and Formal Verification for Integrated Circuit Design Validation

M. Thornton, S. Szygenda, Lun Li, 2005 .

BDD-based conjunctive decomposition using a genetic algorithm and dependent variable affinity

M. Thornton, S. Szygenda, Lun Li, 2005, PACRIM. 2005 IEEE Pacific Rim Conference on Communications, Computers and signal Processing, 2005..

Efficient Spectral Coefficient Calculation Using Circuit Output Probabilities

M. Thornton, V. Nair, 1994 .

SBDD variable reordering based on probabilistic and evolutionary algorithms

Rolf Drechsler, J. P. Williams, Mitchell A. Thornton, 1999, 1999 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM 1999). Conference Proceedings (Cat. No.99CH36368).

A QUANTUM CIRCUIT SIMULATOR BASED ON DECISION DIAGRAMS

M. Thornton, S. Nair, H. El-Rewini, 2007 .

Discrete Function KL Spectrum Computation over Symmetry Groups of Arbitrary Size

M. Thornton, Lun Li, 2005 .

Computer-aided-design methods for emerging quantum computing technologies

Mitchell A. Thornton, David Y. Feinstein, M. Thornton, 2008 .

Probabilistic Equivalence Checking Using PartialHaar Spectral Diagrams

R. Drechsler, M. Thornton, R. Drechsler, 1999 .

Fast Reed-muller Spectrum Computation Using Output Probabilities

M. Thornton, V. Nair, 2007 .

A Numerical Method for Reed-Muller Circuit Synthesis

M. Thornton, 1993 .

Walsh Spectrum Computations Using

M. Thornton, W. J. Townsend, 2001 .

SECURING UNFAMILAR SYSTEM ENTRY POINTS AGAINST FAULTY USER AUTHENTICATION VIA ELECTROMAGNETIC SIDE CHANNEL ATTACKS

John J. Howard, Bobby B. Lyle, M. Thornton, 2010 .

A Vector Space Model for Boolean Switching Networks

M. Thornton, 2014 .

On the Relationship of Boolean Function Spectra and Circuit Output Probabilities

Micah Thornton, J. Tukey, J. Cooley, 1996 .

AN IMPROVED METHODOLOGY FOR SYSTEM THREAT ANALYSIS USING MULTIPLE-VALUED LOGIC AND CONDITIONAL PROBABILITIES

M. Thornton, T. Manikas, S. Nagayama, 2015 .

Multiprocessor Resource Estimation Using a Stochastic Modeling Approach

M. Thornton, D. Andrews, J. D. Bullard, 1996 .

Tradeo Analysis of Integer Multiplier Circuits Implemented in FPGAsM

J. D. Gaiche, M. Thornton, J. V. Lemieux, 2007 .

The Karhunen-Loeve transform of discrete MVL functions

Mitchell A. Thornton, M. Thornton, 2005, 35th International Symposium on Multiple-Valued Logic (ISMVL'05).

QMDDs: Efficient Quantum Function Representation and Manipulation

Robert Wille, Rolf Drechsler, D. Michael Miller, 2016, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

QMDD: A Decision Diagram Structure for Reversible and Quantum Circuits

D. Michael Miller, Mitchell A. Thornton, M. Thornton, 2006, 36th International Symposium on Multiple-Valued Logic (ISMVL'06).

A Quantum Computational Compiler and Design Tool for Technology-Specific Targets

Kaitlin N. Smith, Mitchell A. Thornton, M. Thornton, 2019, 2019 ACM/IEEE 46th Annual International Symposium on Computer Architecture (ISCA).

A Decision Diagram Package for Reversible and Quantum Circuit Simulation

D. Michael Miller, Mitchell A. Thornton, David Goodman, 2006, 2006 IEEE International Conference on Evolutionary Computation.

Quantum Logic Synthesis with Formal Verification

Kaitlin N. Smith, Mitchell A. Thornton, M. Thornton, 2019, 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS).

Efficient adder circuits based on a conservative reversible logic gate

Mitchell A. Thornton, X. Li, J. W. Bruce, 2002, Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002.

Task Value Calculus: Multi-Objective Trade off Analysis Using Multiple-Valued Decision Diagrams

Eric C. Larson, Mitchell A. Thornton, Tyler Giallanza, 2019, 2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL).

Quaternary Voltage-Mode Logic Cells and Fixed-Point Multiplication Circuits

Mitchell A. Thornton, Satyendra R. Datla, M. Thornton, 2010, 2010 40th IEEE International Symposium on Multiple-Valued Logic.

Modeling Medical System Threats with Conditional Probabilities Using Multiple-Valued Logic Decision Diagrams

Theodore W. Manikas, Mitchell A. Thornton, David Y. Feinstein, 2012, 2012 IEEE 42nd International Symposium on Multiple-Valued Logic.

Variable reordering for shared binary decision diagrams using output probabilities

M. Thornton, R. Drechsler, N. Drechsler, 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

Test vector generation and classification using FSM traversals

Stephen A. Szygenda, Mitchell A. Thornton, Ralph Marczynski, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Low power optimization technique for BDD mapped circuits

R. Drechsler, P. Lindgren, M. Thornton, 2001, Proceedings of the ASP-DAC 2001. Asia and South Pacific Design Automation Conference 2001 (Cat. No.01EX455).

ESOP Transformation to Majority Gates for Quantum-dot Cellular Automata Logic Synthesis

Mitchell A. Thornton, David Y. Feinstein, M. Thornton, 2007 .

Graph analysis and transformation techniques for runtime minimization in multi-threaded architectures

Mitchell A. Thornton, D. L. Andrews, M. Thornton, 1997, Proceedings of the Thirtieth Hawaii International Conference on System Sciences.

Boolean Function Matching using Walsh Spectral Decision Diagrams

J. Moore, K. Fazel, M. Thornton, 2006, 2006 IEEE Dallas/CAS Workshop on Design, Applications, Integration and Software.

Quantum Logic Implementation of Unary Arithmetic Operations

D. Michael Miller, Mitchell A. Thornton, David W. Matula, 2008, 38th International Symposium on Multiple Valued Logic (ismvl 2008).

Digital System Verification: A Combined Formal Methods and Simulation Framework

Lun Li, Mitchell A. Thornton, M. Thornton, 2010, Digital System Verification: A Combined Formal Methods and Simulation Framework.

A Discrete Logarithm Number System for Integer Arithmetic Modulo 2^{k}: Algorithms and Lookup Structures

Lun Li, Mitchell A. Thornton, Alex Fit-Florea, 2009, IEEE Transactions on Computers.

A digit serial algorithm for the integer power operation

Lun Li, Mitchell A. Thornton, David W. Matula, 2006, GLSVLSI '06.

Table lookup structures for multiplicative inverses modulo 2/sup k/

Mitchell A. Thornton, Alex Fit-Florea, David W. Matula, 2005, 17th IEEE Symposium on Computer Arithmetic (ARITH'05).

Hardware implementation of an additive bit-serial algorithm for the discrete logarithm modulo 2/sup k/

Lun Li, Mitchell A. Thornton, Alex Fit-Florea, 2005, IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05).

Additive bit-serial algorithm for discrete logarithm modulo 2k

Mitchell A. Thornton, David W. Matula, A. Fit-Florea, 2005 .

Addition-based exponentiation modulo 2k

Mitchell A. Thornton, David W. Matula, A. Fit-Florea, 2005 .

Addition-based exponentiation modulo 2

D. W. Matula, A. Fit-Florea, A. Fit-Florea, 2001 .

Demographic Group Prediction Based on Smart Device User Recognition Gestures

Mitchell A. Thornton, Adel R. Alharbi, Adel R. Alharbi, 2016, 2016 15th IEEE International Conference on Machine Learning and Applications (ICMLA).

Automated quantum oracle synthesis with a minimal number of qubits

Jessie M. Henderson, M. Thornton, D. M. Miller, 2023, Defense + Commercial Sensing.

A Radix-4 Chrestenson Gate for Optical Quantum Computation

Kaitlin N. Smith, Tim LaFave, Duncan L. MacFarlane, 2018, 2018 IEEE 48th International Symposium on Multiple-Valued Logic (ISMVL).

Simulation and Implication Using a Transfer Function Model for Switching Logic

Mitchell A. Thornton, M. Thornton, 2015, IEEE Transactions on Computers.

Demographic Group Classification of Smart Device Users

Mitchell A. Thornton, Adel R. Alharbi, Adel R. Alharbi, 2015, 2015 IEEE 14th International Conference on Machine Learning and Applications (ICMLA).

Higher Dimension Quantum Entanglement Generators

Kaitlin N. Smith, Mitchell A. Thornton, M. Thornton, 2019, ACM J. Emerg. Technol. Comput. Syst..

Using the Asynchronous Paradigm for Reversible Sequential Circuit Implementation

Mitchell A. Thornton, David Y. Feinstein, M. Thornton, 2012, 2012 IEEE 42nd International Symposium on Multiple-Valued Logic.

On the Skipped Variables of Quantum Multiple-Valued Decision Diagrams

Mitchell A. Thornton, David Y. Feinstein, M. Thornton, 2011, 2011 41st IEEE International Symposium on Multiple-Valued Logic.

Advances in Quantum Computing Fault Tolerance and Testing

Suku Nair, Mitchell A. Thornton, David Y. Feinstein, 2007, 10th IEEE High Assurance Systems Engineering Symposium (HASE'07).

Prefix Parallel Adder Virtual Implementation in Reversible Logic

V.S.S. Nair, M.A. Thornton, D.Y. Feinstein, 2007, 2007 IEEE Region 5 Technical Conference.

Faculty and Student Perceptions of Online Learning in Engineering Education

M. Thornton, Min Liu, L. Kinney, 2012 .

Boolean function representation and spectral characterization using AND/OR graphs

Rolf Drechsler, Mitchell A. Thornton, A. Zuzek, 2000, Integr..

Computation of spectral information from logic netlists

Rolf Drechsler, Mitchell A. Thornton, M. Thornton, 2000, Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000).

Extracting Spectral Information from AND / OR Representations

M. Thornton, 2007 .

Transformations amongst the Walsh, Haar, Arithmetic and Reed-Muller Spectral Domains

R. Drechsler, M. Thornton, R. Drechsler, 2001 .

Cache resident data locality analysis

Mitchell A. Thornton, Q. G. Samdani, M. Thornton, 2000, Proceedings 8th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (Cat. No.PR00728).

Using Multiple-Valued Logic Decision Diagrams to Model System Threat Probabilities

Theodore W. Manikas, Mitchell A. Thornton, David Y. Feinstein, 2011, 2011 41st IEEE International Symposium on Multiple-Valued Logic.

A Low Power High Performance Radix-4 Approximate Squaring Circuit

Mitchell A. Thornton, David W. Matula, Satyendra R. Datla, 2009, 2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors.

UNIX Scripting and High-level Language Education Using an Emulator

Mitchell A. Thornton, Ronald W. Skeith, M. Thornton, 2001 .

Multiple Valued Logic: Concepts and Representations

D. Michael Miller, Mitchell A. Thornton, M. Thornton, 2008, Multiple Valued Logic.

A signed binary addition circuit based on an alternative class of addition tables

Mitchell A. Thornton, M. Thornton, 2003, Comput. Electr. Eng..

Fast and Efficient Equivalence Checking based on NAND-BDDs

Rolf Drechsler, M. Thornton, R. Drechsler, 2001 .

On-line Error Detection in a Carry-free Adder

Mitchell A. Thornton, Parag K. Lala, Whitney J. Townsend, 2002, International Workshop on Logic & Synthesis.

Signed Binary Addition Circuitry with Inherent Even Parity Outputs

Mitchell A. Thornton, M. Thornton, 1997, IEEE Trans. Computers.