D. Nirmal

发表

V. LakshmiPrabha, I. Flavia Princess Nesamani, P. Sindhu, 2012, 2012 International Conference on Devices, Circuits and Systems (ICDCS).

Analysis of drain current in short channel drain-extended triple gate FinFETs

D. Nirmal, S. Soman, P. P. Nair, 2013, 2013 International Mutli-Conference on Automation, Computing, Communication, Control and Compressed Sensing (iMac4s).

Gate recessed GaN based HEMT with Si3N4 passivation for microwave applications

D. Nirmal, Prabha. P. Nair, 2016, 2016 International Conference on Inventive Computation Technologies (ICICT).

Guest Editorial: Special Section on Nano Devices, Circuits and Systems

Chandan Kumar Sarkar, D. Nirmal, Valipe Ramgopal Rao, 2017 .

A high speed 256-bit carry look ahead adder design using 22nm strained silicon technology

J. Ajayan, K. Vivek, D. Nirmal, 2015, 2015 2nd International Conference on Electronics and Communication Systems (ICECS).

Investigation on Simulation-Based Specific Absorption Rate in Ultra-Wideband Antenna for Breast Cancer Detection

D. Nirmal, B. Sundarambal, Suresh Subramanian, 2018, IEEE Sensors Journal.

High speed low power Full Adder circuit design using current comparison based domino

J. Ajayan, M. Manikandan, D. Nirmal, 2014, 2014 2nd International Conference on Devices, Circuits and Systems (ICDCS).

The influence of high-k passivation layer on breakdown voltage of Schottky AlGaN/GaN HEMTs

D. Nirmal, N. Mohankumar, A. Shobha Rekh, 2015, Microelectron. J..

A comparative study of high performance dynamic comparators using strained silicon technology

J. Ajayan, D. Nirmal, S. Karthick, 2015, 2015 2nd International Conference on Electronics and Communication Systems (ICECS).

A New Drain Current Model for a Dual Metal Junctionless Transistor for Enhanced Digital Circuit Performance

D. Nirmal, P. Prajoon, J. Charles Pravin, 2016, IEEE Transactions on Electron Devices.

Low power analysis of Triple Gate MOSFETs

V. Kumar, D. Nirmal, F. Princess, 2012, 2012 International Conference on Devices, Circuits and Systems (ICDCS).

Design and simulation of GaN/AlGaN HEMTs with low leakage current and high ON/OFF current ratio

D. Nirmal, S. Soman, P. P. Nair, 2013, 2013 International Mutli-Conference on Automation, Computing, Communication, Control and Compressed Sensing (iMac4s).

22 nm In 0.75 Ga 0.25 As channel-based HEMTs on InP/GaAs substrates for future THz applications

J. Ajayan, D. Nirmal, D. Nirmal, 2017 .

Performance enhancement of the junctionless surrounding gate transistor with high Ion/Ioff ratio

D. Nirmal, A. Surya, J. Charles Pravin, 2015, 2015 International Conference on Innovations in Information, Embedded and Communication Systems (ICIIECS).

Nanoscale channel engineered double gate MOSFET for mixed signal applications using high‐k dielectric

P. Vijayakumar, D. Nirmal, N. Mohankumar, 2013, Int. J. Circuit Theory Appl..

128 Bit High Speed Manchester Carry Chain Adder Implemented using 22nm Strained Silicon Technology with a Supply Voltage of 0.8V

J. Ajayan, K. Vivek, D. Nirmal, 2014 .

Subthreshold performance of gate engineered FinFET devices and circuit with high-k dielectrics

P. Vijayakumar, D. Nirmal, N. Mohankumar, 2013, Microelectron. Reliab..

Current collapse degradation in GaN High Electron Mobility Transistor by virtual gate

D. Nirmal, D. Godfrey, L. Arivazhagan, 2021, Microelectron. J..

Nanosheet field effect transistors-A next generation device to keep Moore's law alive: An intensive study

J. Ajayan, D. Nirmal, A. S. Augustine Fletcher, 2021, Microelectron. J..

Analysis of nanoscale digital circuits using novel drain-gate underlap DMG hetero-dielectric TFET

D. Jackuline Moni, D. Nirmal, D. Gracia, 2022, Microelectron. J..