L. Black

High Performance 45-nm SOI Technology with Enhanced Strain, Porous Low-k BEOL, and Immersion Lithography

S. Narasimha, K. Onishi, H. Nayfeh, 2006, 2006 International Electron Devices Meeting.

Stress dependence and poly-pitch scaling characteristics of (110) PMOS drive current

S. Narasimha, A. Waite, J. Johnson, 2007, 2007 IEEE Symposium on VLSI Technology.

On implementation of embedded phosphorus-doped SiC stressors in SOI nMOSFETs

T. Adam, L. Black, R. Pal, 2008, 2008 Symposium on VLSI Technology.

High performance 32nm SOI CMOS with high-k/metal gate and 0.149µm2 SRAM and ultra low-k back end with eleven levels of copper

M. Belyansky, L. Black, J. Holt, 2006, 2009 Symposium on VLSI Technology.

Stress memorization in high-performance FDSOI devices with ultra-thin silicon channels and 25nm gate lengths

L. Black, M. Ieong, D. Singh, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

Effect of tensile uniaxial stress on the electron transport properties of deeply scaled FD-SOI n-type MOSFETs

H. Nayfeh, L. Black, M. Khare, 2006, IEEE Electron Device Letters.