T. Mii

Trench storage node technology for gigabit DRAM generations

K. Muller, B. Flietner, C.L. Hwang, 1996, International Electron Devices Meeting. Technical Digest.

A fully planarized 0.25 /spl mu/m CMOS technology for 256 Mbit DRAM and beyond

R. Kleinhenz, T. Mii, H. Aochi, 1995, 1995 Symposium on VLSI Technology. Digest of Technical Papers.

Bubble-Free Wafer Bonding of GaAs and InP on Silicon in a Microcleanroom

T. Mii, U. Gösele, V. Lehmann, 1989 .

Suppression of stacking fault expansion in a 4H-SiC epitaxial layer by proton irradiation

T. Mii, S. Harada, M. Kato, 2022, Scientific Reports.

Suppression of stacking-fault expansion in 4H-SiC PiN diodes using proton implantation to solve bipolar degradation

T. Mii, S. Harada, M. Kato, 2022, Scientific Reports.

Analysis of carrier lifetime in a drift layer of 1.2-kV class 4H–SiC devices toward complete suppression of bipolar degradation

T. Mii, S. Harada, M. Kato, 2022, Materials Science in Semiconductor Processing.

Tunneling Structures Fabricated by Silicon Wafer Direct Bonding

T. Mii, R. Stengl, K. Ahn, 1989 .

Characteristics of CMOS device isolation for the ULSI age

Andres Bryant, T. Mii, W. Hansch, 1994, Proceedings of 1994 IEEE International Electron Devices Meeting.

Suppression of partial dislocation glide motion during contraction of stacking faults in SiC epitaxial layers by hydrogen ion implantation

T. Mii, S. Harada, M. Kato, 2023, Applied Physics Express.