K. Rebibis

发表

Extreme wafer thinning optimization for via-last applications

Eric Beyne, Dave Thomas, Anne Jourdain, 2016, 2016 IEEE International 3D Systems Integration Conference (3DIC).

3D stacking using Cu-Cu direct bonding for 40um pitch and beyond

K. Rebibis, E. Beyne, A. L. Manna, 2012, 2012 4th Electronic System-Integration Technology Conference.

Surface Treatment to Enable Low Temperature and Pressure Copper Direct Bonding

K. Rebibis, E. Beyne, I. De Wolf, 2016, 2016 IEEE 66th Electronic Components and Technology Conference (ECTC).

Integration and manufacturing aspects of moving from WaferBOND HT-10.10 to ZoneBOND material in temporary wafer bonding and debonding for 3D applications

A. Jourdain, K. Rebibis, Andy Miller, 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.

Hybrid 14nm FinFET - Silicon Photonics Technology for Low-Power Tb/s/mm2 Optical I/O

K. Rebibis, S. Van Huylenbroeck, P. Verheyen, 2018, 2018 IEEE Symposium on VLSI Technology.

Challenges and solutions on pre-assembly processes for thinned 3D wafers with micro-bumps on the backside

R. A. Miller, K. Rebibis, G. Beyer, 2014, 2014 IEEE 16th Electronics Packaging Technology Conference (EPTC).

Process development to enable 3D IC multi-tier die bond for 20μM pitch and beyond

Doug C. H. Yu, K. Rebibis, G. Beyer, 2014, 2014 IEEE 64th Electronic Components and Technology Conference (ECTC).

3D Stacking Using Bump-Less Process for Sub 10um Pitch Interconnects

A. Jourdain, F. Inoue, K. Rebibis, 2016, 2016 IEEE 66th Electronic Components and Technology Conference (ECTC).

Hybrid 14 nm FinFET-Silicon Photonics Technology for Low-Power Tb / s / mm 2 Optical I /

K. Rebibis, P. Verheyen, D. Velenis, 2018 .

Development of underfilling and thermo-compression bonding processes for stacking multi-layer 3D ICs

Eric Beyne, Andy Miller, Gerald Beyer, 2014, Proceedings of the 5th Electronics System-integration Technology Conference (ESTC).

Process development and characterization of 3D multi-die stacking

K. Rebibis, Andy Miller, G. Beyer, 2020, 2020 IEEE 8th Electronics System-Integration Technology Conference (ESTC).

TCB optimization for stacking large thinned dies with 40 and 20 μm pitch microbumps

K. Rebibis, Andy Miller, G. Beyer, 2018, 2018 7th Electronic System-Integration Technology Conference (ESTC).

Impact of the combination of stress buffer layer and wafer level underfill on 3D IC assembly using thermal compression bonding

K. Rebibis, E. Beyne, P. Bex, 2017, 2017 21st European Microelectronics and Packaging Conference (EMPC) & Exhibition.

3D IC assembly using thermal compression bonding and wafer-level underfill — Strategies for quality improvement and throughput enhancement

F. Inoue, K. Rebibis, Andy Miller, 2016, 2016 IEEE 18th Electronics Packaging Technology Conference (EPTC).

Comparison of properties of thermo-compression bonded 3D stacks using a liquid and a dry-film wafer level underfills

R. A. Miller, K. Rebibis, E. Beyne, 2015, 2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC).

Wafer applied and no flow underfill screening for 3D stacks

K. Rebibis, E. Beyne, B. Swinnen, 2012, 2012 IEEE 14th Electronics Packaging Technology Conference (EPTC).

Developing underfill process in screening of no-flow underfill and wafer-applied underfill materials for 3D stacking

R. A. Miller, K. Rebibis, G. Beyer, 2013, 2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013).

Study on 3D self-aligned assembly using chips with etched edge and SAM for liquid confinement

K. Rebibis, I. De Wolf, J. Derakhshandeh, 2018, 2018 International Conference on Electronics Packaging and iMAPS All Asia Conference (ICEP-IAAC).

Thermal, Mechanical and Reliability assessment of Hybrid bonded wafers, bonded at 2.5μm pitch

K. Rebibis, G. Beyer, E. Beyne, 2020, 2020 IEEE 70th Electronic Components and Technology Conference (ECTC).

Edge trimming for surface activated dielectric bonded wafers

A. Jourdain, F. Inoue, K. Rebibis, 2017 .

Reflow process optimization for micro-bumps applications in 3D technology

Eric Beyne, Erik Jan Marinissen, Andy Miller, 2014, Proceedings of the 5th Electronics System-integration Technology Conference (ESTC).

Liquid mediated direct bonding and bond propagation

K. Rebibis, Andy Miller, G. Beyer, 2016, 2016 6th Electronic System-Integration Technology Conference (ESTC).

SAMs (self-assembled monolayers) passivation of cobalt microbumps for 3D stacking of Si chips

K. Rebibis, Andy Miller, E. Beyne, 2016 .

Study of wafer warpage for Fan-Out wafer level packaging: finite element modelling and experimental validation

K. Rebibis, E. Beyne, A. Phommahaxay, 2019, 2019 20th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE).

Development of a new improved high performance flip chip BGA package

A.Y.S. Sun, H.B. Tan, D.Y.R. Chong, 2004, 2004 Proceedings. 54th Electronic Components and Technology Conference (IEEE Cat. No.04CH37546).

Formation, processing and characterization of Co-Sn intermetallic compounds for potential integration in 3D interconnects

Eric Beyne, Ingrid De Wolf, Bjorn Vandecasteele, 2015 .

Edge Trimming Induced Defects on Direct Bonded Wafers

A. Jourdain, F. Inoue, K. Rebibis, 2018 .

TSV-assisted Hybrid FinFET CMOS - Silicon Photonics Technology for High Density Optical I/O

K. Rebibis, D. Guermandi, S. Van Huylenbroeck, 2019, European Conference on Optical Communication.

HIGH DENSITY AND HIGH BANDWIDTH CHIP-TO-CHIP CONNECTIONS WITH 20μm PITCH FLIP-CHIP ON FAN-OUT WAFER LEVEL PACKAGE

E. Beyne, A. Phommahaxay, K. Rebibis, 2018, 2018 International Wafer Level Packaging Conference (IWLPC).

A Novel Fan-Out Concept for Ultra-High Chip-to-Chip Interconnect Density with 20-µm Pitch

Eric Beyne, Andy Miller, John Slabbekoorn, 2018, 2018 IEEE 68th Electronic Components and Technology Conference (ECTC).

Novell embedded microbump approach for die-to-die and wafer-to-wafer interconnects with variable microbump diameters and down to 5 um interconnect pitch scaling

F. Inoue, K. Rebibis, G. Beyer, 2019, 2019 22nd European Microelectronics and Packaging Conference & Exhibition (EMPC).

Growth rate of IMC in the binary sytems of Co/Sn and Cu/Sn

S. H. Sharifi, K. Rebibis, Andy Miller, 2017, 2017 IEEE International Interconnect Technology Conference (IITC).

Cost components for 3D system integration

Eric Beyne, Erik Jan Marinissen, Anne Jourdain, 2014, Proceedings of the 5th Electronics System-integration Technology Conference (ESTC).

Single-release-layer process for temporary bonding applications in the 3D integration area

A. Jourdain, K. Rebibis, Andy Miller, 2015, 2015 IEEE 65th Electronic Components and Technology Conference (ECTC).

Novel Temporary Bonding and Debonding Solutions Enabling an Ultrahigh Interonnect Density Fo-Wlp Structure Assembly with Quasi-Zero Die Shift

K. Rebibis, Andy Miller, G. Beyer, 2019, 2019 International Wafer Level Packaging Conference (IWLPC).

Material technology for 2.5D/3D package

K. Rebibis, Andy Miller, E. Beyne, 2015, 2015 IEEE CPMT Symposium Japan (ICSJ).

Low Warpage Wafer Level Transfer Molding Post 3D Die to Wafer Assembly

K. Rebibis, G. Beyer, E. Beyne, 2016, Electronic Components and Technology Conference.

Morphological characterization and mechanical behavior by dicing and thinning on direct bonded Si wafer

F. Inoue, K. Rebibis, E. Beyne, 2020 .

Influence of Si wafer thinning processes on (sub)surface defects

A. Jourdain, J. D. Vos, F. Inoue, 2017 .

Evaluation of Mechanical Stress Induced During IC Packaging

K. Rebibis, E. Beyne, V. Cherman, 2018, 2018 IEEE 68th Electronic Components and Technology Conference (ECTC).

3D chip package interaction thermo-mechanical challenges: Proximity effects of Through Silicon vias and μ-bumps

Bart Vandevelde, Eric Beyne, Geert Van der Plas, 2012, 2012 IEEE International Conference on IC Design & Technology.

Use of Wafer Applied Underfill for 3D Stacking

Eric Beyne, Antonio La Manna, C. Gerets, 2011 .

Investigation of Co Thin Film as Buffer Layer Applied to Cu/Sn Eutectic Bonding and UBM With Sn, SnCu, and SAC Solders Joints

K. Rebibis, E. Beyne, Kuan-Neng Chen, 2017, IEEE Transactions on Components, Packaging and Manufacturing Technology.

Die to wafer 3D stacking for below 10um pitch microbumps

Teng Wang, Eric Beyne, Anne Jourdain, 2016, 2016 IEEE International 3D Systems Integration Conference (3DIC).

Impact of ELD layers in mechanical properties of microbumps for 3D stacking

K. Rebibis, Andy Miller, E. Beyne, 2016, 2016 6th Electronic System-Integration Technology Conference (ESTC).

Exposed Die-Top Encapsulation Molding for an Improved High- Performance Flip Chip BGA Package

A.Y.S. Sun, D.Y.R. Chong, B.K. Lim, 2006, IEEE Transactions on Advanced Packaging.

Thermal compression bonding of 20 μm pitch micro bumps with pre-applied underfill - Process and reliability

K. Rebibis, E. Beyne, V. Simons, 2015, 2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC).