D. Flandre

发表

Laterally asymmetric channel engineering in fully depleted double gate SOI MOSFETs for high performance analog applications

Abhinav Kranti, Denis Flandre, Jean-Pierre Raskin, 2004 .

SOI Sensing Platforms for Water Vapour and Light Detection

D. Flandre, N. André, P. Gérard, 2016 .

ased Methodology for the Design of CMOS Analog Circuits and Its Application to the Synthesis of a Silicon-on-Insulator

Denis Flandre, Fernando Silveira, Paul Jespers, 1996 .

Characterization of high-efficiency multi-crystalline silicon in industrial production

Denis Flandre, Laurent Francis, Jean-Pierre Raskin, 2013 .

An efficient and accurate procedure to evaluate distortion in SOI FD MOSFET

D. Flandre, F.J. Garcia Sanchez, A. Cerdeira, 2001, 2001 International Semiconductor Device Research Symposium. Symposium Proceedings (Cat. No.01EX497).

Miniaturized Wireless Sensing System for Real-Time Breath Activity Recording

D. Flandre, R. Pampin, P. Gerard, 2010, IEEE Sensors Journal.

Wireless microsensors system for monitoring breathing activity

Denis Flandre, Sylvain Druart, Laurent Francis, 2009 .

Effective mobility in FinFET structures with HfO2 and SiON gate dielectrics and TaN gate electrode

Denis Flandre, Tamara Rudenko, Nadine Collaert, 2005 .

Impact of self-heating and substrate effects on small-signal output conductance in UTBB SOI MOSFETs

Denis Flandre, Jean-Pierre Raskin, Sergej Makovejev, 2012 .

Origin of the Low-Frequency Noise in the Asymmetric Self-Cascode Structure Composed by Fully Depleted SOI nMOSFETs

D. Flandre, R. Assalti, Rodrigo Trevidoli Dorai, 2017 .

High‐Performance and Industrially Viable Nanostructured SiO x Layers for Interface Passivation in Thin Film Solar Cells

D. Flandre, M. Edoff, J. Borme, 2021, Solar RRL.

Optimization of Back Contact Grid Size in Al2O3-Rear-Passivated Ultrathin CIGS PV Cells by 2-D Simulations

D. Flandre, J. Krč, M. Edoff, 2020, IEEE Journal of Photovoltaics.

Addressing the impact of rear surface passivation mechanisms on ultra-thin Cu(In,Ga)Se2 solar cell performances using SCAPS 1-D model

D. Flandre, L. Francis, Guoli Li, 2017 .

Influence of Ga/(Ga + In) grading on deep‐defect states of Cu(In,Ga)Se2 solar cells

D. Flandre, B. Vermang, M. Edoff, 2015 .

Employing Si solar cell technology to increase efficiency of ultra-thin Cu(In,Ga)Se2 solar cells

D. Flandre, B. Vermang, M. Edoff, 2014, Progress in photovoltaics.

Electrical characterization of true Silicon-On-Nothing MOSFETs fabricated by Si layer transfer over a pre-etched cavity

Denis Flandre, Jean-Pierre Raskin, Benoit Olbrechts, 2007 .

Sensitivity of Silicon Nanowire Biochemical Sensors

D. Flandre, G. Ghibaudo, L. Selmi, 2014 .

Signal-to-noise ratio optimization for detecting bacteria with interdigitated microelectrodes

Denis Flandre, Laurent Francis, Numa Couniot, 2013 .

Modeling of ultrathin double-gate nMOS/SOI transistors

D. Flandre, P. Francis, A. Terao, 1994 .

Measurement and two-dimensional simulation of thin-film SOI MOSFETs: Intrinsic gate capacitances at elevated temperatures

D. Flandre, J. Colinge, F. Wiele, 1996 .

Fully depleted SOI-CMOS technology for high temperature IC applications

Denis Flandre, Jean-Pierre Colinge, B. Gentinne, 1997 .

On the high-temperature subthreshold slope of thin-film SOI MOSFETs

V. Kilchytska, D. Flandre, V. Dessard, 2002, IEEE Electron Device Letters.

Determination of film and surface recombination in thin-film SOI devices using gated-diode technique

Denis Flandre, Sorin Cristoloveanu, Jean-Pierre Colinge, 2004 .

Substrate Bias Effect Linked to Parasitic Series Resistance in Multiple-Gate SOI MOSFETs

D. Flandre, N. Collaert, M. Jurczak, 2007, IEEE Electron Device Letters.

Unusual floating body effect in fully depleted MOSFETs

D. Flandre, S. Cristoloveanu, M. Bawedin, 2004, 2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573).

A Quasi-Static Model of Silicon Substrate Effects in Graphene Field Effect Transistors

D. Flandre, J. Raskin, Pierre-Antoine Haddad, 2017, IEEE Electron Device Letters.

Physics of Gate Modulated Resonant Tunneling (RT)-FETs: Multi-barrier MOSFET for steep slope and high on-current

D. Flandre, J. Colinge, A. Afzalian, 2011 .

Characterization of ultrathin SOI film and application to short channel MOSFETs

D. Flandre, J. Raskin, E. Dubois, 2008, Nanotechnology.

Micromachined thin-film sensors for SOI-CMOS co-integration

D. Flandre, J. Raskin, J. Laconte, 2006 .

Thin Film Fully-Depleted SOI Four-Gate Transistors

D. Flandre, K. Akarvardar, B. Blalock, 2007 .

A review of special gate coupling effects in long-channel SOI MOSFETs with lightly doped ultra-thin bodies and their compact analytical modeling

D. Flandre, T. Rudenko, V. Kilchytska, 2016 .

Extended MASTAR Modeling of DIBL in UTB and UTBB SOI MOSFETs

D. Flandre, J. Raskin, O. Faynot, 2012, IEEE Transactions on Electron Devices.

Bulk and surface micromachined MEMS in thin film SOI technology

Denis Flandre, Jean-Pierre Raskin, Thomas Pardoen, 2007 .

Sensitive DNA electrical detection based on interdigitated Al/Al2O3 microelectrodes

Denis Flandre, Luis Moreno Hagelsieb, Rémi Pampin, 2004 .

Self-heating in 28 nm bulk and FDSOI

D. Flandre, J. Raskin, M. Haond, 2015, EUROSOI-ULIS 2015: 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon.

SOI-specific MOSFET modeling issues

Denis Flandre, D. Flandre, 2007 .

Direct protein detection with a nano-interdigitated array gate MOSFET.

Denis Flandre, Jean-Pierre Colinge, Jean-Pierre Raskin, 2009, Biosensors & bioelectronics.

A 16 $\times$ 16 CMOS Capacitive Biosensor Array Towards Detection of Single Bacterial Cell

Denis Flandre, Numa Couniot, Laurent A. Francis, 2016, IEEE Transactions on Biomedical Circuits and Systems.

Capacitive biosensing of bacterial cells: Analytical model and numerical simulations

Nancy Van Overstraeten, D. Flandre, A. Afzalian, 2015 .

High-energy neutrons effect on strained and non-strained SOI MuGFETs and planar MOSFETs

Denis Flandre, Cor Claeys, Eddy Simoen, 2012, Microelectron. Reliab..

Total-dose effects caused by high-energy neutrons and γ-rays in Multiple-Gate FETs

D. Flandre, N. Collaert, O. Militaru, 2009, 2009 European Conference on Radiation and Its Effects on Components and Systems.

Total-Dose Effects Caused by High-Energy Neutrons and $\gamma $-Rays in Multiple-Gate FETs

D. Flandre, N. Collaert, O. Militaru, 2009, IEEE Transactions on Nuclear Science.

Study of Neutron Irradiation Effects on SOI and Strained SOI MuGFETs Assessed by Low-Frequency Noise

D. Flandre, N. Collaert, E. Simoen, 2010 .

Effect of high-energy neutrons on MuGFETs

Denis Flandre, Otilia Militaru, Nadine Collaert, 2010 .

Gate-edge charges related effects and performance degradation in advanced multiple-gate MOSFETs

Denis Flandre, Cor Claeys, Rita Rooyackers, 2011 .

Electrical characterization of advanced MOSFETs towards analog and RF applications

D. Flandre, J. Raskin, V. Kilchytska, 2020, 2020 IEEE Latin America Electron Devices Conference (LAEDC).

Wide frequency band assessment of 28 nm FDSOI technology platform for analogue and RF applications

Denis Flandre, M. Haond, Jean-Pierre Raskin, 2014 .

Improved modeling of gate leakage currents for fin-shaped field-effect transistors

Denis Flandre, Antonio Cerdeira, Valeriya Kilchytska, 2013 .

Effects of High–Energy Neutrons on Advanced SOI MOSFETs

D. Flandre, O. Militaru, V. Kilchytska, 2011 .

The Influence of Back Gate Bias on the OCTO SOI MOSFET's Response to X-ray Radiation

S. P. Gimenez, D. Flandre, M. D. Silveira, 2015 .

Boosting the radiation hardness and higher reestablishing pre-rad conditions by using OCTO layout style for MOSFETs

D. Flandre, C. Renaux, Leonardo Navarenho de Souza Fino, 2014, 2014 29th Symposium on Microelectronics Technology and Devices (SBMicro).

Frequency Variation of the Small-Signal Output Conductance of Decananometer MOSFETs Due to Substrate Crosstalk

V. Kilchytska, D. Flandre, N. Collaert, 2007, IEEE Electron Device Letters.

Boosting the total ionizing dose tolerance of digital switches by using OCTO SOI MOSFET

S. P. Gimenez, D. Flandre, M. D. Silveira, 2015 .

Measurement of threshold voltages of thin-film accumulation-mode PMOS/SOI transistors

D. Flandre, F. Van de Wiele, E. Lora-Tamayo, 1991, IEEE Electron Device Letters.

Compact model for highly-doped double-gate SOI MOSFETs targeting baseband analog applications

Denis Flandre, Antonio Cerdeira, Jean-Pierre Raskin, 2007 .

ON DOUBLE-GATE MOSFETS AND FINFETS MODELING

D. Flandre, B. Iñíguez, M. Estrada, 2014 .

Roadmap for nanometer ultra-low-power digital circuits based on sub / near-threshold CMOS logic

D. Flandre, D. Bol, J.-D. Legat, 2009 .

High-temperature perspectives of UTB SOI MOSFETs

O. Faynot, F. Andrieu, D. Flandre, 2011, Ulis 2011 Ultimate Integration on Silicon.

Specific features of multiple-gate MOSFET threshold voltage and subthreshold slope behavior at high temperatures

Denis Flandre, Nadine Collaert, Malgorzata Jurczak, 2007 .

3-D Analytical Models for the Short-Channel Effect Parameters in Undoped FinFET Devices

D. Flandre, B. Iñíguez, J. Roig, 2007 .

Characteristics of nMOS/GAA (Gate-All-Around) Transistors neal Threshold

D. Flandre, P. Francis, A. Terao, 1992, ESSDERC '92: 22nd European Solid State Device Research conference.

Analysis of source-follower buffers implemented with graded-channel SOI nMOSFETs operating at cryogenic temperatures

D. Flandre, M. Souza, M. Pavanello, 2009 .

A charge-based continuous model for submicron graded-channel nMOSFET for analog circuit simulation

Denis Flandre, Marcelo Antonio Pavanello, Michelly de Souza, 2005 .

Thin-film fully-depleted SOI CMOS technology, devices and circuits for LVLP analog/digital/microwave applications

D. Flandre, D. Vanhoenacker, 1998, 1998 International Semiconductor Conference. CAS'98 Proceedings (Cat. No.98TH8351).

ased C,-Continuous Fully-Depleted SFET Model for Analog Applications

D. Flandre, B. Gentinne, L. Ferreira, 1996 .

A physically-based continuous analytical graded-channel SOI nMOSFET model for analog applications

D. Flandre, B. Iniguez, D. Flandre, 2002, Proceedings of the Fourth IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.02TH8611).

Low-Wavelengths SOI CMOS Photosensors for Biological Applications

Nancy Van Overstraeten-Schlögel, D. Flandre, B. Macq, 2017 .

Low-Wavelengths SOI CMOS Photosensors for Biomedial Applications

Denis Flandre, Benoît Macq, Aryan Afzalian, 2011 .

Fully integrated blue/UV SOI CMOS photosensor for biomedical and environmental applications

Denis Flandre, Aryan Afzalian, Olivier Bulteel, 2010 .

A 3-D Analytical Physically Based Model for the Subthreshold Swing in Undoped Trigate FinFETs

D. Flandre, B. Iñíguez, V. Kilchytska, 2007, IEEE Transactions on Electron Devices.

Accurate effective mobility extraction by split C-V technique in SOI MOSFETs: suppression of the influence of floating-body effects

D. Flandre, N. Collaert, D. Lederer, 2005, IEEE Electron Device Letters.

Contribution of carrier tunneling and gate induced drain leakage effects to the gate and drain currents of fin–shaped field–effect transistors

S. I. Garduño, D. Flandre, M. Estrada, 2011 .

Analytic modeling of gate tunneling currents for nano-scale double-gate MOSFETs

D. Flandre, A. Cerdeira, M. Estrada, 2012, 2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS).

Comparison of SOI versus bulk performances of CMOS micropower single-stage OTAs

Denis Flandre, J. P. Eggermont, Paul Jespers, 1994 .

On the improvement of DC analog characteristics of FD SOI transistors by using asymmetric self-cascode configuration

D. Flandre, R. Trevisoli, R. Doria, 2016 .

Improved operation of graded-channel SOI nMOSFETs down to liquid helium temperature

D. Flandre, J. Martino, M. Souza, 2016 .

Effect of channel doping concentration on the harmonic distortion of asymmetric n- and p-type self-cascode MOSFETs

D. Flandre, R. Doria, M. de Souza, 2015, 2015 30th Symposium on Microelectronics Technology and Devices (SBMicro).

Liquid helium temperature analog operation of asymmetric self-cascode FD SOI MOSFETs

D. Flandre, M. de Souza, V. Kilchtyska, 2012, 2012 IEEE International SOI Conference (SOI).

Analog performance of asymmetric self-cascode p-channel fully depleted SOI transistors

D. Flandre, M. de Souza, M. Pavanello, 2012, 2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS).

Asymmetric self-cascode configuration to improve the analog performance of SOI nMOS transistors

D. Flandre, M. de Souza, M. Pavanello, 2011, IEEE 2011 International SOI Conference.

Impact of Asymmetric Channel Configuration on the Linearity of Double-Gate SOI MOSFETs

D. Flandre, A. Cerdeira, D. Flandre, 2006, 2006 International Caribbean Conference on Devices, Circuits and Systems.

High performance analog operation of double gate transistors with the graded-channel architecture at low temperatures

Denis Flandre, Marcelo Antonio Pavanello, Jean-Pierre Raskin, 2005 .

ECCTD ’ 01-European Conference on Circuit Theory and Design , August 28-31 , 2001 , Espoo , Finland SOI-CMOS Transconductor for Very High Frequencies

D. Flandre, S. Celma, J. Sabadell, 2001 .

A new analytical model for the two-terminal MOS capacitor on SOI substrate

D. Flandre, F. van de Wiele, 1988, IEEE Electron Device Letters.

A Physical Model for the Characterization of SOI MOSFETs in Linear Operation

D. Flandre, F. van de Wiele, 1989, ESSDERC '89: 19th European Solid State Device Research Conference.

Second-order analytical modeling of thin-film SOI MOSFETs

D. Flandre, F. van de Wiele, 1989, IEEE SOS/SOI Technology Conference.

Characterization of quantum efficiency, effective lifetime and mobility in thin film ungated SOI lateral PIN photodiodes

Denis Flandre, Aryan Afzalian, D. Flandre, 2007 .

SOI-CMOS compatible low-power gas sensor using sputtered and drop-coated metal-oxide active layers

D. Flandre, E. Llobet, X. Correig, 2005 .

Extraction of physical device dimensions of SOI MOSFETs from gate capacitance measurements

D. Flandre, B. Gentinne, 1993 .

Impact of neutron irradiation on oxidized high-resistivity silicon substrates with and without a trap-rich passivation layer

D. Flandre, C. Roda Neve, D. Lederer, 2009, 2009 European Conference on Radiation and Its Effects on Components and Systems.

Low-Voltage Low-Power High-Temperature SOI CMOS Rectifiers

D. Flandre, D. Levacq, D. Flandre, 2006, 2006 IEEE international SOI Conferencee Proceedings.

Single event effects and total ionising dose in 600V Si-on-SiC LDMOS transistors for rad-hard space applications

Denis Flandre, V. Pathirana, C. W. Chan, 2017, 2017 47th European Solid-State Device Research Conference (ESSDERC).

Design and Fabrication of Silicon-on-Silicon-Carbide Substrates and Power Devices for Space Applications

D. Flandre, J. Gardner, P. Mawby, 2017 .

Impact of hydrogen dopant incorporation on InGaZnO, ZnO and In2O3 thin film transistors.

D. Flandre, N. André, Guoli Li, 2020, Physical chemistry chemical physics : PCCP.

High temperature and radiation hard CMOS SOI sub-threshold voltage reference

D. Flandre, P. Gérard, L. Francis, 2013, 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

Formation of TiN/CoSi2 barrier layer on thin-film SOI for high-temperature applications

Denis Flandre, Jean-Pierre Colinge, R. Rai, 1997 .

Junctionless nanowire transistors operation at temperatures down to 4.2 K

D. Flandre, R. Trevisoli, R. Doria, 2016 .

Analog operation of Junctionless Nanowire Transistors down to liquid helium temperature

D. Flandre, R. Trevisoli, R. Doria, 2014, 2014 11th International Workshop on Low Temperature Electronics (WOLTE).

Using Statistical Student’s t-Test to Qualify the Electrical Performance of the Diamond MOSFETs

Gabriel Augusto da Silva, S. P. Gimenez, D. Flandre, 2018, 2018 33rd Symposium on Microelectronics Technology and Devices (SBMicro).

Comparative experimental study of the improved MOSFETs matching by using the hexagonal layout style

S. P. Gimenez, D. Flandre, C. Renaux, 2017, 2017 32nd Symposium on Microelectronics Technology and Devices (SBMicro).

Electrical Characterization and Special Properties of FINFET Structures

Denis Flandre, Tamara Rudenko, Nadine Collaert, 2006 .

Parameter Extraction in Quadratic Exponential Junction Model with Series Resistance using Global Lateral Fitting

D. Flandre, A. Ortiz-Conde, J. Muci, 2010 .

Can we connect trillions of IoT sensors in a sustainable way? A technology/circuit perspective (Invited)

David Bol, Denis Flandre, Guerric de Streel, 2015, 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

Ultra-low power management and voltage regulation

D. Flandre, Pierre-Antoine Haddad, G. D. Streel, 2017 .

Ultra-low-power wireless communications

D. Flandre, D. Bol, G. D. Streel, 2017 .

An in-depth analysis of temperature effect on DIBL in UTBB FD SOI MOSFETs based on experimental data, numerical simulations and analytical models

D. Flandre, M. Haond, N. Planes, 2017 .

Analysis and modelling of temperature effect on DIBL in UTBB FD SOI MOSFETs

D. Flandre, M. Haond, N. Planes, 2016, 2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS).

29.3: Invited Paper: Defect Engineering in n‐Type Oxide Semiconductor TFTs

D. Flandre, Guoli Li, L. Liao, 2021 .

15.3: Defect Engineering in n‐Type Oxide Semiconductor TFTs

D. Flandre, Guoli Li, L. Liao, 2021, SID Symposium Digest of Technical Papers.

Revised split C-V technique for mobility investigation in advanced devices

D. Flandre, J. Raskin, N. Collaert, 2005, 2005 IEEE International SOI Conference Proceedings.

Let’s make it Noisy: A Simulation Methodology for adding Intrinsic Physical Noise to Cryptographic Designs

Denis Flandre, François-Xavier Standaert, Kashif Nawaz, 2018, 2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME).

Out-of-plane MEMS-based mechanical airflow sensor co-integrated in SOI CMOS technology

Denis Flandre, Laurent Francis, Jean-Pierre Raskin, 2014 .

Wafer‐Scale Nanoimprint Lithography Process Towards Complementary Silicon Nanowire Field‐Effect Transistors for Biosensor Applications

D. Flandre, S. Ingebrandt, L. Francis, 2018, physica status solidi (a).

Deep-submicron DC to RF SOI MOSFET characterization and modelling

Denis Flandre, Pascal Simon, C. Raynaud, 1999 .

Investigation Of Charge Control-Related Performances In Double-Gate SOI MOSFETs

Denis Flandre, Jean-Pierre Raskin, Valeriya Kilchytska, 2003 .

SOI current and voltage reference sources for applications up to 300°C"

D. Flandre, J. Colinge, A. Vandooren, 1997 .

SOI current and voltage reference sources for applications up to 300/spl deg/C

D. Flandre, J. Colinge, A. Vandooren, 1998, 1998 Fourth International High Temperature Electronics Conference. HITEC (Cat. No.98EX145).

Compact model for single event transients and total dose effects at high temperatures for partially depleted SOI MOSFETs

Denis Flandre, El Hafed Boufouss, Joaquín Alvarado, 2010, Microelectron. Reliab..

A compact model for Single Event Effects in PD SOI sub-micron MOSFETs

D. Flandre, V. Kilchytska, J. Alvarado, 2011, 2011 12th European Conference on Radiation and Its Effects on Components and Systems.

Self-Heating in FDSOI UTBB MOSFETs at Cryogenic Temperatures and its Effect on Analog Figures of Merit

D. Flandre, J. Raskin, M. Haond, 2020, IEEE Journal of the Electron Devices Society.

FD MOS SOI circuit to enhance the ratio of illuminated to dark current of a co-integrated a-Si: H photodiode

Denis Flandre, Antonio Cerdeira, Magali Estrada, 2003, Microelectron. Reliab..

A Capacitance-to-Frequency Converter With On-Chip Passivated Microelectrodes for Bacteria Detection in Saline Buffers Up to 575 MHz

David Bol, Denis Flandre, Numa Couniot, 2015, IEEE Transactions on Circuits and Systems II: Express Briefs.

Quantitative characterization of biofunctionalization layers by robust image analysis for biosensor applications

D. Flandre, L. Jacques, L. Francis, 2016 .

Capacitive Biosensing of Bacterial Cells: Sensitivity Optimization

D. Flandre, A. Afzalian, L. Francis, 2016, IEEE Sensors Journal.

Experimental comparative study between the diamond MOSFET and its conventional counterpart in high temperatures environment

Denis Flandre, Christian Renaux, Salvador P. Gimenez, 2013, 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

The Impact of LCE and PAMDLE Regarding Different CMOS ICs Nodes and High Temperatures

S. P. Gimenez, D. Flandre, J. Swart, 2021, IEEE Journal of the Electron Devices Society.

Boosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environment

S. P. Gimenez, D. Flandre, S. Finco, 2017, IEEE Transactions on Device and Materials Reliability.

Impact of Using the Octagonal Layout for SOI MOSFETs in a High-Temperature Environment

D. Flandre, C. Renaux, Salvador Pinillos Gimenez, 2015, IEEE Transactions on Device and Materials Reliability.

Abnormal drain current (ADC) effect and its mechanism in FD SOI MOSFETs

D. Flandre, S. Cristoloveanu, M. Bawedin, 2006, IEEE Electron Device Letters.

Investigating the electronic properties of Al2O3/Cu(In,Ga)Se2 interface

Denis Flandre, Marika Edoff, Bart Vermang, 2015 .

Thin-film solar cells based on chalcogenide (CIGS) and kesterite (CZTS) quaternary semiconducting compounds

D. Flandre, M. Zhukova, R. Kotipalli, 2017 .

Low-Power, High-Sensitivity Temperature Sensor Based on Ultrathin SOI Lateral p-i-n Gated Diode

D. Flandre, N. André, L. Francis, 2019, IEEE Transactions on Electron Devices.

A method for threshold voltage extraction in junctionless MOSFETs using the derivative of transconductance-to-current ratio

D. Flandre, S. Barraud, T. Rudenko, 2020, Solid-State Electronics.

Charge-pumping characterization of SOI devices fabricated by means of wafer bonding over pre-patterned cavities

T. M. Chung, D. Flandre, J. Raskin, 2007 .

Robust Methodology for Low-Frequency Noise Power Analyses in Advanced MOS Transistors

D. Flandre, V. Kilchytska, B. K. Esfeh, 2019, 2019 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS).

Depletion effects in moderately doped TiO2 layers from C–V characteristics of MIS structures on Si

D. Flandre, R. Snyders, J. Lontchi, 2021, Applied Physics Express.

Correlation and optimization of the optoelectrical properties of DC magnetron-sputtered Cu2ZnSnS4 absorber layer as a function of the material composition

D. Flandre, O. Poncelet, M. Zhukova, 2021 .

Graded-channel SOI NMOSFET and its potential to analog applications

Denis Flandre, Marcelo Antonio Pavanello, Joao Antonio Martino, 1999 .

Variation Range of Different Inductor Topologies with Shields for RF and Inductive Sensing Applications

M. H. Said, D. Flandre, J. Raskin, 2022, Sensors.

Branch-Based Design of Carry Calculation Cell for Ultra-Low Power and High-Temperature Applications

Denis Flandre, Jean-Didier Legat, Ilham Hassoune, 2004 .

A talk about university – industry R&D collaborations in the contexts of Walloon competitiveness clustersand European projects on topics such as microsystems for aerospace or biomedical applications

Denis Flandre, D. Flandre, 2014 .

Development, characterisation and simulation of wafer bonded Si-on-SiC substrates

D. Flandre, V. Kilchytska, V. Pathirana, 2017 .

Comparison of DNA detection methods using nanoparticles and silver enhancement.

D. Flandre, J. Remacle, L. Moreno-Hagelsieb, 2005, IEE proceedings. Nanobiotechnology.

Intrinsic rectification in common-gated graphene field-effect transistors

D. Flandre, J. Raskin, Pierre-Antoine Haddad, 2018 .

Detection Limit of ultra-scaled Nanowire Biosensors

D. Flandre, A. Afzalian, N. Couniot, 2012 .

Enhanced ultraviolet photoresponse in a graphene-gated ultra-thin Si-based photodiode

D. Flandre, J. Raskin, N. André, 2019, Journal of Physics D: Applied Physics.

Design techniques for reliable timing closure in ULV SoCs

David Bol, Julien De Vos, Cédric Hocquet, 2011 .

Low-frequency noise of submicron graded-channel SOI nMOSFETs at high temperature

D. Flandre, R. T. Doria, M. de Souza, 2016, 2016 31st Symposium on Microelectronics Technology and Devices (SBMicro).

Energy-band engineering for improved charge retention in fully self-aligned double floating-gate single-electron memories.

D. Flandre, J. Raskin, E. Dubois, 2011, Nano letters.

A Wearable Low-Power Sensing Platform for Environmental and Health Monitoring: The Convergence Project

Denis Flandre, Adrian M. Ionescu, Tan-Phu Vuong, 2021, Sensors.

Millimeter- and Terahertz-wave stochastic sensors based on reversible insulator-to-metal transition in vanadium dioxide

D. Flandre, M. Burla, J. Leuthold, 2021 .

Tuning Range Comparison Between Different Planar Inductors Layouts on PCB

D. Flandre, L. Francis, Bilel Maamer, 2020, 2020 IEEE International Conference on Design & Test of Integrated Micro & Nano-Systems (DTS).

TRAPPISTe Pixel Sensor with 2μm SOI technology

D. Flandre, E. Cortina, E. Martin, 2011, 2009 IEEE Nuclear Science Symposium Conference Record (NSS/MIC).

TRAPPIST e Pixel Sensor with 2μm SOI technology

D. Flandre, E. Cortina, E. Martin, 2009 .

Leakage Current and Low-Frequency Noise Analysis and Reduction in a Suspended SOI Lateral p-i-n Diode

D. Flandre, N. André, L. Francis, 2017, IEEE Transactions on Electron Devices.

Highly re fl ective rear surface passivation design for ultra-thin Cu ( In , Ga ) Se 2 solar cells

D. Flandre, B. Vermang, M. Edoff, 2014 .

Effect of high temperature on analog parameters of Asymmetric Self-Cascode SOI nMOSFETs

D. Flandre, M. de Souza, L. d'Oliveira, 2014, 2014 29th Symposium on Microelectronics Technology and Devices (SBMicro).

Temperature and back-gate bias influence on the operation of lateral SOI PIN photodiodes

D. Flandre, A. Afzalian, R. Doria, 2014, 2014 29th Symposium on Microelectronics Technology and Devices (SBMicro).

Low temperature tunneling current enhancement in silicide/Si Schottky contacts with nanoscale barrier width

D. Flandre, J. Raskin, E. Dubois, 2011, 1110.5437.

Room-temperature DC-sputtered p-type CuO accumulation-mode thin-film transistors gated by HfO2

D. Flandre, Guoli Li, M. Zhukova, 2022, Applied Physics Letters.

ac capacitance and conductance measurements of two-terminal metal-oxide-semiconductor-oxide-semiconductor capacitors on silicon-on-insulator substrates

D. Flandre, J. Esteve, F. Campabadal, 1991 .

Design and fabrication of a power Si/SiC LDMOSFET for high temperature applications

C. W. Chan, D. Flandre, J. Gardner, 2017 .

SleepRunner: A 28-nm FDSOI ULP Cortex-M0 MCU With ULL SRAM and UFBR PVT Compensation for 2.6–3.6-μW/DMIPS 40–80-MHz Active Mode and 131-nW/kB Fully Retentive Deep-Sleep Mode

D. Flandre, D. Bol, R. Dekimpe, 2021, IEEE Journal of Solid-State Circuits.

CMOS compatible anodic Al2O3 based sensors for bacteria detection

D. Flandre, J. Raskin, L. Francis, 2009 .

A modified Bosch-type process for precise surface micromachining of polysilicon

D. Flandre, J. Raskin, B. Parvais, 2002 .

A hybrid graphene-metal oxide sensor for formaldehyde detection at room temperature

D. Flandre, J. Raskin, N. André, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Enhanced stability and mobility of solution-processed oxide thin-film transistors with bilayer terbium-incorporated indium oxide channel

D. Flandre, Guoli Li, B. Iñíguez, 2022, Applied Physics Letters.

GENETIC MOTIF DISCOVERY APPLIED TO AUDIO ANALYSIS

D. Flandre, 2012 .

Dependence of the optimum length of light doped region of GC SOI nMOSFET with front gate bias

D. Flandre, M. de Souza, R. Assalti, 2014, 2014 29th Symposium on Microelectronics Technology and Devices (SBMicro).

SOI CMOS compatible low-power microheater optimization and fabrication for smart gas sensor implementations

D. Flandre, J. Raskin, J. Laconte, 2002, Proceedings of IEEE Sensors.

Self-Cascode Current-Voltage Curve-Construction Algorithm from Single MOSFET Measurements for Analog Figures-of-Merit Extraction

D. Flandre, V. Kilchytska, M. de Souza, 2019, Journal of Integrated Circuits and Systems.

Boosting the MOSFETs matching by using diamond layout style

D. Flandre, C. Renaux, Salvador Pinillos Gimenez, 2016, 2016 31st Symposium on Microelectronics Technology and Devices (SBMicro).

Reliable characteristics and stabilization of on-membrane SOI MOSFET-based components heated up to 335 °C

D. Flandre, N. André, P. Gérard, 2016 .

Use of back gate bias to enhance the analog performance of planar FD and UTBB SOI transistors-based self-cascode structures

D. Flandre, R. Trevisoli, R. Doria, 2015, 2015 30th Symposium on Microelectronics Technology and Devices (SBMicro).

Technological parameters scaling influence on the analog performance of Graded-Channel SOI nMOSFET transistors

D. Flandre, M. de Souza, R. Assalti, 2014, 2014 International Caribbean Conference on Devices, Circuits and Systems (ICCDCS).

Revision of interface coupling in ultra-thin body silicon-on-insulator MOSFETs

D. Flandre, V. Lysenko, T. Rudenko, 2013 .

Analog ICs by Using OCTO Layout Style

D. Flandre, C. Renaux, S. Gimenez, 2013 .

Comparative Experimental Study of X-Ray Radiation Effects in the Threshold Voltage between the OCTO and Conventional SOI nMOSFETs

D. Flandre, L. Fino, C. Renaux, 2013 .

Special Features of the Back-Gate Effects in Ultra-Thin Body SOI MOSFETs

D. Flandre, J. Raskin, T. Rudenko, 2011 .

3D Simulation of Triple-Gate MOSFETs

D. Flandre, A. Cerdeira, V. Kilchytska, 2010, 2010 27th International Conference on Microelectronics Proceedings.

Characterization and design methodology for low-distortion MOSFET-C analog structures in multithreshold deep-submicrometer SOI CMOS technologies

D. Flandre, A. Cerdeira, V. Kilchytska, 2006, IEEE Transactions on Electron Devices.

Process alternative: SOI for heterogeneous systems

D. Flandre, 2000 .

Status and Trends of SOI

D. Flandre, J. Colinge, 1994, ESSCIRC '94: Twientieth European Solid-State Circuits Conference.

DNA electrical detection based on inductor resonance frequency in standard CMOS technology

D. Flandre, J. Raskin, D. Lederer, 2003, ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003..

Raman Strain-Shift Measurements and Prediction from First-Principles in Highly-Strained Silicon

D. Flandre, J. Raskin, M. Colla, 2022, 2212.03049.

Low-frequency noise in asymmetric self-cascode FD SOI nMOSFETs

D. Flandre, R. Doria, M. de Souza, 2016, 2016 31st Symposium on Microelectronics Technology and Devices (SBMicro).

Role of Ionic Strength in Staphylococcal Cell Aggregation.

D. Flandre, N. Couniot, Y. Dufrêne, 2016, Langmuir : the ACS journal of surfaces and colloids.

Comparison of TiSi2 , CoSi2, and NiSi for Thin‐Film Silicon‐on‐Insulator Applications

Denis Flandre, Jean-Pierre Colinge, Jean-Pierre Raskin, 1997 .

Structural and Opto-electronic characterization of CuO thin films prepared by DC reactive magnetron sputtering

D. Flandre, M. Zhukova, J. Proost, 2020, Journal of Materials Science: Materials in Electronics.

Surface Passivation of CIGS Solar Cells Using Gallium Oxide

Thomas G. Allen, D. Flandre, M. Meuris, 2018 .

Lytic enzymes as selectivity means for label-free, microfluidic and impedimetric detection of whole-cell bacteria using ALD-Al2O3 passivated microelectrodes.

J Mahillon, J Rasson, D. Flandre, 2015, Biosensors & bioelectronics.

Detection mechanism in highly sensitive ZnO nanowires network gas sensors

D. Flandre, J. Raskin, D. Lenoble, 2019, Sensors and Actuators B: Chemical.

Light management design in ultra-thin chalcopyrite photovoltaic devices by employing optical modelling

D. Flandre, J. Krč, M. Topič, 2019, Solar Energy Materials and Solar Cells.

Functional Nanomaterials and Devices for Electronics, Sensors and Energy Harvesting

Denis Flandre, Valeriya Kilchytska, Alexei Nazarov, 2014 .

Miniaturized and low cost innovative detection systems for medical and environmental applications

D. Flandre, O. Bulteel, Luis Moreno-Hagelsieb, 2010, 2010 2nd Circuits and Systems for Medical and Environmental Applications Workshop (CASME).

Method for fabricating third generation photovoltaic cells based on Si quantum dots using ion implantation into SiO2

D. Flandre, G. Ross, R. Delamare, 2011 .

Thin films stress extraction using micromachined structures and wafer curvature measurements

Denis Flandre, Jean-Pierre Raskin, Thomas Pardoen, 2004 .

Multiscale Simulation of Epoxide Adsorbate Functionalization on Graphene Nanoribbons

D. Flandre, A. Afzalian, J. Charlier, 2013 .

Effect of parasitic elements on UTBB FD SOI MOSFETs RF figures of merit

Denis Flandre, Jean-Pierre Raskin, Valeriya Kilchytska, 2014 .

Improvement of high-frequency FinFET performance by fin width engineering

V. Kilchytska, D. Flandre, J.-P Raskin, 2012, 2012 IEEE International SOI Conference (SOI).

Analog/RF performance of multiple gate SOI devices: wideband simulations and characterization

J.-P. Raskin, D. Flandre, Tsung Ming Chung, 2006, IEEE Transactions on Electron Devices.

Perovskite Metal–Oxide–Semiconductor Structures for Interface Characterization

António J. N. Oliveira, D. Flandre, J. Mascarenhas, 2021, Advanced Materials Interfaces.

28 nm FDSOI analog and RF Figures of Merit at N2 cryogenic temperatures

B. Kazemi Esfeh, N. Planes, M. Haond, 2019, Solid-State Electronics.

A Capacitorless 1T-DRAM on SOI Based on Dynamic Coupling and Double-Gate Operation

D. Flandre, S. Cristoloveanu, M. Bawedin, 2008, IEEE Electron Device Letters.

SiOx patterned based substrates implemented in Cu(In, Ga)Se2 ultrathin solar cells: optimum thickness

António J. N. Oliveira, D. Flandre, M. Edoff, 2021, Photovoltaic Specialists Conference.

Modelling Supported Design of Light Management Structures in Ultra-Thin Cigs Photovoltaic Devices

Denis Flandre, Marika Edoff, Marko Topič, 2019, Informacije MIDEM - Journal of Microelectronics, Electronic Components and Materials.

Highly reflective rear surface passivation design for ultra-thin Cu(In,Ga)Se2 solar cells

Denis Flandre, Marika Edoff, Rickard Gunnarsson, 2015 .

Optimisation of rear reflectance in ultra-thin CIGS solar cells towards >20% efficiency

D. Flandre, L. Francis, O. Poncelet, 2017 .

High-responsivity broadband photodetection of an ultra-thin In2S3/CIGS heterojunction on steel.

D. Flandre, Guoli Li, J. Lontchi, 2021, Optics letters.

Electrical detection of DNA hybridization: three extraction techniques based on interdigitated Al/Al2O3 capacitors.

J-P Raskin, D. Flandre, J. Raskin, 2007, Biosensors & bioelectronics.

Implementation of FD SOI CMOS Technology in ITE

Denis Flandre, Krzysztof Kucharski, Piotr Grabiec, 2011 .

DNA hybridization electrical detection by 3 independent measurement techniques based on interdigitated Al/Al2O3 capacitors

Denis Flandre, Jean-François Remacle, Jean-Pierre Raskin, 2006 .

Impact of neutron irradiation on the RF properties of oxidized high-resistivity silicon substrates with and without a trap-rich passivation layer

Denis Flandre, Jean-Pierre Raskin, Joaquín Alvarado, 2011, Microelectron. Reliab..

An electrical evaluation method for the silicidation of silicon nanowires

D. Flandre, J. Raskin, E. Dubois, 2009 .

ULPFA: A New Efficient Design of a Power-Aware Full Adder

Ian O'Connor, Denis Flandre, Jean-Didier Legat, 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.

Harmonic distortion analysis of double gate graded-channel MOSFETs operating in saturation

Denis Flandre, Marcelo Antonio Pavanello, Rodrigo Trevisoli Doria, 2008, Microelectron. J..

Gate-All-Around Technology for Harsh Environment Applications

Denis Flandre, Jean-Pierre Colinge, A. Vandooren, 1999 .

Indirect light absorption model for highly strained silicon infrared sensors

D. Flandre, J. Raskin, G. Rignanese, 2021, Journal of Applied Physics.

3-D CMOS compatible MEMS sensors and actuators

Denis Flandre, Jean-Pierre Raskin, Nicolas André, 2008 .

Defect Self‐Compensation for High‐Mobility Bilayer InGaZnO/In2O3 Thin‐Film Transistor

D. Flandre, Guoli Li, Yawei Lv, 2019, Advanced Electronic Materials.

Ultralow Power Ionizing Dose Sensor Based on Complementary Fully Depleted MOS Transistors for Radiotherapy Application

D. Flandre, N. André, J. Lipovetzky, 2020, IEEE Transactions on Nuclear Science.

Fully-Depleted SOI MOSFET Sensors in Accumulation Mode for Total Dose Measurement

D. Flandre, N. André, J. Lipovetzky, 2018, 2018 IEEE Nuclear Science Symposium and Medical Imaging Conference Proceedings (NSS/MIC).

Exploring and suppressing the kink effect of black phosphorus field-effect transistors operating in the saturation regime.

D. Flandre, Yuan Liu, Guoli Li, 2019, Nanoscale.

Physical modeling and design of thin-film SOI lateral PIN photodiodes

D. Flandre, A. Afzalian, D. Flandre, 2005, IEEE Transactions on Electron Devices.

A battery-less BLE smart sensor for room occupancy tracking supplied by 2.45-GHz wireless power transfer

David Bol, Denis Flandre, Pengcheng Xu, 2019, Integr..

Scaling laws and performance improvements of integrated biosensor microarrays with multi-pixel per spot

Denis Flandre, Numa Couniot, Aryan Afzalian, 2012 .

A 16×16 CMOS Capacitive Biosensor Array Towards Detection of Single Bacterial Cell

Denis Flandre, Numa Couniot, Laurent A. Francis, 2016, IEEE Trans. Biomed. Circuits Syst..

Understanding hydrogen and nitrogen doping on active defects in amorphous In-Ga-Zn-O thin film transistors

D. Flandre, N. André, Guoli Li, 2018, Applied Physics Letters.

Characterization and modelling of single event transients in LDMOS-SOI FETs

Denis Flandre, El Hafed Boufouss, Joaquín Alvarado, 2011, Microelectron. Reliab..

A Formal Study of Power Variability Issues and Side-Channel Attacks for Nanoscale Devices

Denis Flandre, François-Xavier Standaert, Nicolas Veyrat-Charvillon, 2011, EUROCRYPT.

High-efficiency solar cell embedded in SOI substrate for ULP autonomous circuits

D. Flandre, O. Bulteel, D. Flandre, 2009, 2009 IEEE International SOI Conference.

Charge collection mapping of a novel ultra-thin silicon strip detector for hadrontherapy beam monitoring

D. Flandre, E. Gil, M. Bouterfa, 2013 .

Validation of a Novel ultra-thin silicon Strip Detector for Hadron Therapy beam Monitoring

Denis Flandre, Mohamed Bouterfa, D. Flandre, 2013, J. Circuits Syst. Comput..

Characterization of ultra-thin silicon strip detectors for hadrontherapy beam monitoring

Denis Flandre, Eduardo Cortina Gil, Mohamed Bouterfa, 2013, 2013 IEEE International Instrumentation and Measurement Technology Conference (I2MTC).

Hadrontherapy beam monitoring: Towards a new generation of ultra-thin p-type silicon strip detectors

D. Flandre, J. Raskin, E. Gil, 2011, 2011 2nd International Conference on Advancements in Nuclear Instrumentation, Measurement Methods and their Applications.

Extensive Electrical Characterization Methodology of Advanced MOSFETs Towards Analog and RF Applications

D. Flandre, J. Raskin, V. Kilchytska, 2021, IEEE Journal of the Electron Devices Society.

Perspectives of UTBB FD SOI MOSFETs for analog and RF applications

Denis Flandre, Jean-Pierre Raskin, Sergej Makovejev, 2014 .

Ultra-thin body and thin-BOX SOI CMOS technology analog figures of merit

O. Faynot, Denis Flandre, Jean-Pierre Raskin, 2012 .

Radiometric Partial Discharge Detection: A Review

M. H. Said, D. Flandre, P. Romano, 2023, Energies.

Enhanced Ultraviolet Avalanche Photodiode With 640-nm-Thin Silicon Body Based on SOI Technology

D. Flandre, N. André, I. S. Alirezaei, 2020, IEEE Transactions on Electron Devices.

Ultra-Scaled Si Nanowire Biosensors for Single DNA Molecule Detection

D. Flandre, A. Afzalian, 2023 .

Passivation effects of atomic-layer-deposited aluminum oxide

D. Flandre, L. Francis, O. Poncelet, 2013 .

Tuning the surface conditioning of trapezoidally shaped silicon nanowires by (3-aminopropyl)triethoxysilane.

D. Flandre, J. Raskin, A. Vlad, 2014 .

Macro-Modeling Library in Simscape for MEMS Pressure Sensors Based on Energy-Flow Paradigm

Denis Flandre, Edmond Cretu, Thibault P. Delhaye, 2019, 2019 Symposium on Design, Test, Integration & Packaging of MEMS and MOEMS (DTIP).

A Physical Model of Contact Resistance in Ti-Contacted Graphene-Based Field Effect Transistors

D. Flandre, J. Raskin, Yun Zeng, 2021, IEEE Transactions on Electron Devices.

Efficient ultra low power rectification at 13.56 MHz for a 10 µA load current

D. Flandre, G. Gosset, P.-A Haddad, 2014, 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

Fully-Automated and Portable Design Methodology for Optimal Sizing of Energy-Efficient CMOS Voltage Rectifiers

Denis Flandre, Geoffroy Gosset, D. Flandre, 2011, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

Origin of low-temperature negative transconductance in multilayer MoS2 transistors

D. Flandre, Yuan Liu, N. André, 2021, Applied Physics Letters.

Raman strain–shift measurements and prediction from first-principles in highly strained silicon

D. Flandre, J. Raskin, M. Colla, 2022, Journal of Materials Science: Materials in Electronics.

Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuits

David Bol, Denis Flandre, Jean-Didier Legat, 2009, ISLPED.

Black phosphorus field effect transistors stable in harsh conditions via surface engineering

D. Flandre, Guoli Li, L. Liao, 2020 .

Notice of Violation of IEEE Publication PrinciplesSystem-Level Analysis of O-QPSK Transceiver for 2.4-GHZ Band IEEE 802.15.4 Zigbee Standard

D. Flandre, L. Vandendorpe, A. El Oualkadi, 2007, 2007 14th International Conference on Mixed Design of Integrated Circuits and Systems.

HDL System-Level Design of O-QPSK Receiver for 2.4-GHz Band IEEE 802.15.4

Denis Flandre, Ahmed El Oualkadi, D. Flandre, 2007 .

SOI CMOS Transistors for RF and Microwave Applications

Denis Flandre, Jean-Pierre Raskin, Danielle Vanhoenacker-Janvier, 2001 .

High-performance dual-mode ultra-thin broadband CdS/CIGS heterojunction photodetector on steel.

D. Flandre, Guoli Li, J. Lontchi, 2022, Optics express.

A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA

Denis Flandre, Fernando Silveira, Paul Jespers, 1996, IEEE J. Solid State Circuits.

Fully Integrated High-Q Switched Capacitor Bandpass Filter with Center Frequency and Bandwidth Tuning

D. Flandre, M. El Kaamouchi, D. Vanhoenacker-Janvier, 2007, 2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium.

New experiments on the electrodeposition of iron in porous silicon

D. Flandre, C. Renaux, V. Scheuren, 2000 .

Electrodes-oxide-semiconductor device for biosensing: Renewed conformal analysis and multilayer algorithm

D. Flandre, J. Raskin, I. Huynen, 2020 .

LDMOS in SOI technology with very-thin silicon film

Denis Flandre, Maryline Bawedin, Christian Renaux, 2004 .

Gate leakage currents model for FinFETs implemented in Verilog‐A for electronic circuits design

Denis Flandre, Antonio Cerdeira, Valeriya Kilchytska, 2014 .

NANOSIL network of excellence-silicon-based nanostructures and nanodevices for long-term nanoelectronics applications

Denis Flandre, Sorin Cristoloveanu, Jean-Pierre Raskin, 2008 .

Low-power dihexylquaterthiophene-based thin film transistors for analog applications.

D. Flandre, B. Nysten, A. Jonas, 2008 .

SOI CMOS compatible low-power microheater optimization for the fabrication of smart gas sensors

D. Flandre, J. Laconte, C. Dupont, 2004, IEEE Sensors Journal.

High-sensitivity capacitive humidity sensor using 3-layer patterned polyimide sensing film

Denis Flandre, Jean-Pierre Raskin, J. Laconte, 2003, Proceedings of IEEE Sensors 2003 (IEEE Cat. No.03CH37498).

Experimental Study of the OCTO SOI nMOSFET to Improve the Device Performance

Denis Flandre, Christian Renaux, L. Navarenho de Souza Fino, 2012 .

Performance of OCTO Layout Style on SOI MOSFET Switches under High-temperature Operation

D. Flandre, C. Renaux, E. H. S. Galembeck, 2019 .

Gradient importance sampling: An efficient statistical extraction methodology of high-sigma SRAM dynamic characteristics

David Bol, Denis Flandre, Johan Segers, 2018, 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE).

On the Origin of the Excess Low-Frequency Noise in Graded-Channel Silicon-on-Insulator nMOSFETs

T. M. Chung, D. Flandre, J. Raskin, 2007, IEEE Electron Device Letters.

The low-frequency noise behaviour of graded-channel SOI nMOSFETs

Denis Flandre, Marcelo Antonio Pavanello, Eddy Simoen, 2007 .

Low Frequency Noise Measurements at Elevated Temperatures on Thin-Film SOI n-MOSFET

D. Flandre, V. Dessard, D. Flandre, 1998, 28th European Solid-State Device Research Conference.

Ultimate Limit in Optoelectronic Performances of Monolayer WSe2 Sloping-Channel Transistors.

D. Flandre, Guoli Li, Z. Fan, 2023, Nano letters.

Comparative Study of Al2O3 and HfO2 for Surface Passivation of Cu(In,Ga)Se2 Thin Films: An Innovative Al2O3/HfO2 Multistack Design

D. Flandre, M. Meuris, G. Brammertz, 2021, physica status solidi (a).

A Compact Model for Single Event Effects in PD SOI Sub-Micron MOSFETs

Denis Flandre, Valeriya Kilchytska, Joaquín Alvarado, 2011, IEEE Transactions on Nuclear Science.

A new interdigitated array microelectrode-oxide-silicon sensor with label-free, high sensitivity and specificity for fast bacteria detection

Denis Flandre, Laurent Francis, Jean-Pierre Raskin, 2011 .

Ultra Low-Loss Si Substrate for On-Chip UWB GHz Antennas

C. Gimeno, D. Flandre, M. Rack, 2019, IEEE Journal of the Electron Devices Society.

An Ultra-Low-Power Read-Out Circuit for Interfacing Novel Gas Sensors Matrices

D. Flandre, L. Francis, Y. Danlée, 2022, IEEE Sensors Journal.

Green SoCs for a sustainable Internet-of-Things

David Bol, Denis Flandre, Jean-Didier Legat, 2013, 2013 IEEE Faible Tension Faible Consommation.

Ultra low power flow-to-frequency SOI MEMS transducer

Denis Flandre, Laurent Francis, Jean-Pierre Raskin, 2010 .

Analysis and design of a family of low-power class AB operational amplifiers

D. Flandre, F. Silveira, D. Flandre, 2000, Proceedings 13th Symposium on Integrated Circuits and Systems Design (Cat. No.PR00843).

19.6 A 40-to-80MHz Sub-4μW/MHz ULV Cortex-M0 MCU SoC in 28nm FDSOI With Dual-Loop Adaptive Back-Bias Generator for 20μs Wake-Up From Deep Fully Retentive Sleep Mode

David Bol, Denis Flandre, Pengcheng Xu, 2019, 2019 IEEE International Solid- State Circuits Conference - (ISSCC).

Information Theoretic and Security Analysis of a 65-Nanometer DDSLL AES S-Box

Denis Flandre, François-Xavier Standaert, Dina Kamel, 2011, CHES.

Scaling Trends for Dual-Rail Logic Styles Against Side-Channel Attacks: A Case-Study

Denis Flandre, François-Xavier Standaert, Kashif Nawaz, 2017, COSADE.

Millimeter-wave to near-terahertz sensors based on reversible insulator-to-metal transition in VO2

D. Flandre, M. Burla, J. Leuthold, 2023, Communications Materials.

Dew-Based Wireless Mini Module for Respiratory Rate Monitoring

P. Dupuis, D. Flandre, B. Rue, 2012, IEEE Sensors Journal.

Electronic properties of negatively charged SiOx films deposited by Atmospheric Pressure Plasma Liquid Deposition for surface passivation of p-type c-Si solar cells

D. Flandre, G. Beaucarne, R. Kotipalli, 2016 .

28-nm FD-SOI CMOS RF Figures of Merit Down to 4.2 K

Denis Flandre, Jean-Pierre Raskin, Valeriya Kilchytska, 2020, IEEE Journal of the Electron Devices Society.

28 FDSOI analog and RF Figures of Merit at cryogenic temperatures

N. Planes, M. Haond, D. Flandre, 2018, 2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS).

Floating-Body SOI Memory: Concepts, Physics and Challenges

Denis Flandre, Sorin Cristoloveanu, Florin Udrea, 2009 .

Low temperature operation of graded-channel SOI nMOSFETs for analog applications

D. Flandre, J. Martino, P. G. Der Agopian, 2002, Proceedings of the 5th European Workshop on Low Temperature Electronics.

A Simple Method for Measuring Si-Fin Sidewall Roughness by AFM

D. Flandre, Xiaohui Tang, B. Nysten, 2009, IEEE Transactions on Nanotechnology.

Carrier Mobility in Undoped Triple-Gate FinFET Structures and Limitations of Its Description in Terms of Top and Sidewall Channel Mobilities

V. Kilchytska, D. Flandre, N. Collaert, 2008, IEEE Transactions on Electron Devices.

Measurement and modeling of thin-film accumulation-mode SOI p-MOSFET intrinsic gate capacitances

Denis Flandre, Jean-Pierre Colinge, B. Gentinne, 1996 .

Moderate Inversion Model of Ultrathin Double-gate Nmos/soi Transistors

Denis Flandre, P. Francis, F. Van de Wiele, 1995 .

On the MOSFET Threshold Voltage Extraction by Transconductance and Transconductance-to-Current Ratio Change Methods: Part I—Effect of Gate-Voltage-Dependent Mobility

V. Kilchytska, D. Flandre, J-P Raskin, 2011, IEEE Transactions on Electron Devices.

Composite ULP diode fabrication, modelling and applications in multi-V-th FD SOICMOS technology

Denis Flandre, David Levacq, Christophe Liber, 2004 .

Analysis, Modeling, and Design of a 2.45-GHz RF Energy Harvester for SWIPT IoT Smart Sensors

David Bol, Denis Flandre, Pengcheng Xu, 2019, IEEE Journal of Solid-State Circuits.

Analysis and Design of RF Energy-Harvesting Systems With Impedance-Aware Rectifier Sizing

D. Flandre, D. Bol, Pengcheng Xu, 2023, IEEE Transactions on Circuits and Systems - II - Express Briefs.

Automated Design of a 13.56 MHz 19 µW Passive Rectifier With 72% Efficiency Under 10 µA load

Denis Flandre, Jean-Pierre Raskin, Pierre-Antoine Haddad, 2016, IEEE Journal of Solid-State Circuits.

A Self-Gating RF Energy Harvester for Wireless Power Transfer With High-PAPR Incident Waveform

David Bol, Denis Flandre, Pengcheng Xu, 2021, IEEE Journal of Solid-State Circuits.

A Battery-Less BLE IoT Motion Detector Supplied by 2.45-GHz Wireless Power Transfer

David Bol, Denis Flandre, Pengcheng Xu, 2018, 2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS).

Automated design of a 13.56 MHz corner-robust efficient differential drive rectifier for 10 μA load

Denis Flandre, Jean-Pierre Raskin, Pierre-Antoine Haddad, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

A 0.48mm2 5μW-10mW indoor/outdoor PV energy-harvesting management unit in a 65nm SoC based on a single bidirectional multi-gain/multi-mode switched-cap converter with supercap storage

David Bol, Julien De Vos, Denis Flandre, 2015, ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC).

28 nm FD SOI Technology Platform RF FoM

V. Kilchytska, N. Planes, M. Haond, 2014, 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits

J. P. Eggermont, A. Viviani, B. Gentinne, 1999 .

Power-delay product minimization in high-performance 64-bit carry-select adders

Denis Flandre, Helmut Schettler, Thomas Ludwig, 2004, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Innovating SOI memory devices based on floating-body effects

Denis Flandre, Sorin Cristoloveanu, Maryline Bawedin, 2007 .

Compact diamond MOSFET model accounting for PAMDLE applicable down 150 nm node

Denis Flandre, Christian Renaux, Salvador Pinillos Gimenez, 2014 .

Effect of the temperature on on Junctionless Nanowire Transistors electrical parameters down to 4K

D. Flandre, R. Trevisoli, R. Doria, 2014, 2014 29th Symposium on Microelectronics Technology and Devices (SBMicro).

FinFET analogue characterization from DC to 110 GHz

Denis Flandre, Nadine Collaert, Jean-Pierre Raskin, 2005 .

Perspective of FinFETs for analog applications

V. Kilchytska, J.-P. Raskin, D. Flandre, 2004, Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850).

On the MOSFET Threshold Voltage Extraction by Transconductance and Transconductance-to-Current Ratio Change Methods: Part II—Effect of Drain Voltage

V. Kilchytska, D. Flandre, A. Nazarov, 2011, IEEE Transactions on Electron Devices.

Comprehensive Analytical Comparison of Ring Oscillators in FDSOI Technology: Current Starving Versus Back-Bias Control

D. Flandre, D. Bol, L. Van Brandt, 2022, IEEE Transactions on Circuits and Systems I: Regular Papers.

Radiation-hard design for SOI MOS inverters

Denis Flandre, Jean-Pierre Colinge, P. Francis, 1994 .

Operation of suspended lateral SOI PIN photodiode with aluminum back gate

Denis Flandre, Florin Udrea, Syed Zeeshan Ali, 2016, 2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS).

Self-Cascode SOI versus Graded-Channel SOI MOS Transistors for Low-Voltage Applications

Denis Flandre, Santiago Celma, Belén Calvo, 2006 .

The effect of series resistance on threshold voltage measurement techniques for fully depleted SOI MOSFETs

Denis Flandre, Steve Hall, S. P. Wainwright, 1996 .

Impact of radiations on the electromechanical properties of materials and on the piezoresistive and capacitive transduction mechanisms used in microsystems

Denis Flandre, Sylvain Druart, Laurent Francis, 2013, Photonics West - Micro and Nano Fabricated Electromechanical and Optical Components.

SOI Technology for Future High-Performance Smart Cards

Denis Flandre, Jean-Jacques Quisquater, Amaury Nève, 2003, IEEE Micro.

Substrate crosstalk reduction using SOI technology

Denis Flandre, Jean-Pierre Colinge, Jean-Pierre Raskin, 1997 .

Electrical characterization of SOI solar cells in a wide temperature range

D. Flandre, M. de Souza, O. Bulteel, 2010, 2010 IEEE International SOI Conference (SOI).