H. Kim

Highly scalable nonvolatile resistive memory using simple binary oxide driven by asymmetric unipolar voltage pulses

S. O. Park, I. Baek, M.S. Lee, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Multi-layer cross-point binary oxide resistive memory (OxRRAM) for post-NAND storage application

I. Baek, M.S. Lee, S. Seo, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

The breakthrough in data retention time of DRAM using Recess-Channel-Array Transistor(RCAT) for 88 nm feature size and beyond

D. Kim, H. Kim, H. Kim, 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).

Highly scalable on-axis confined cell structure for high density PRAM beyond 256Mb

S.O. Park, H. Kim, U. Chung, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

Highly Scalable Phase Change Memory with CVD GeSbTe for Sub 50nm Generation

S.O. Park, H. Kim, U. Chung, 2007, 2007 IEEE Symposium on VLSI Technology.

Impact of rapid thermal annealing on data retention time for 256 Mb and 1 Gb DRAM technology

Y.T. Kim, H.S. Kim, S.K. Park, 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

Key Integration Technologies for Nanoscale FRAMs

Kinam Kim, H. Kim, J. Park, 2007, 2007 Sixteenth IEEE International Symposium on the Applications of Ferroelectrics.

A methodology to characterize device-level endurance in 1T1C (1-transistor and 1-capacitor) FRAM

H. Kim, S.Y. Lee, J. Kim, 2008, 2008 17th IEEE International Symposium on the Applications of Ferroelectrics.

Switching Properties in Spin Transper Torque MRAM with sub-5Onm MTJ size

U-In Chung, H.S. Kim, S.O. Park, 2006, 2006 7th Annual Non-Volatile Memory Technology Symposium.

An outstanding and highly manufacturable 80nm DRAM technology

J.W. Lee, H.J. Kim, Kinam Kim, 2003, IEEE International Electron Devices Meeting 2003.