R. Berger

A generic architecture for wafer-scale neuromorphic systems

J. I. Raffel, James Mann, R. Berger, 1990 .

A laser-programmable multichip module on silicon

J. Raffel, R. Berger, P. Wyatt, 1993, 1993 Proceedings Fifth Annual IEEE International Conference on Wafer Scale Integration.

Megapixel CMOS image sensor fabricated in three-dimensional integrated circuit technology

R. Berger, A. Soares, K. Newcomb, 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

Time Delay Integration and In-Pixel Spatiotemporal Filtering Using a Nanoscale Digital CMOS Focal Plane Readout

B. Tyrrell, R. Berger, J. Baker, 2009, IEEE Transactions on Electron Devices.

Lincoln Laboratory's 3D Circuit Integration Technology

R. Berger, A. Soares, N. Checka, 2008 .

A 64 $\times$ 64-Pixel CMOS Test Chip for the Development of Large-Format Ultra-High-Speed Snapshot Imagers

T.S. Perry, B.M. Tyrrell, D.D. Rathman, 2008, IEEE Journal of Solid-State Circuits.

Wafer-scale 3D integration of InGaAs photodiode arrays with Si readout circuits by oxide bonding and through-oxide vias

R. Berger, A. Soares, J. Knecht, 2011 .

Gigahertz (GHz) hard x-ray imaging using fast scintillators

A. Ronzhin, Cris W. Barnes, R. Berger, 2013, Optics & Photonics - Optical Engineering + Applications.

Design approaches for digitally dominated active pixel sensors: leveraging Moore's Law scaling in focal plane readout design

Brian Tyrrell, R. Berger, Curtis Colonero, 2008, SPIE OPTO.

Design and testing of an all-digital readout integrated circuit for infrared focal plane arrays

Joshua Model, Robert Berger, Curtis Colonero, 2005, SPIE Optics + Photonics.