C. Tsai

A high-performance, high-density 28nm eDRAM technology with high-K/metal-gate

S. Natarajan, K. Huang, Y. Ting, 2011, 2011 International Electron Devices Meeting.

16-60 V rated LDMOS show advanced performance in a 0.72 /spl mu/m evolution BiCMOS power technology

C. Tsai, J. Erdeljac, L. Hutter, 1997, International Electron Devices Meeting. IEDM Technical Digest.

Analysis of high current breakdown and UIS behavior of resurf LDMOS (RLDMOS) devices

Taylor R. Efland, Sameer Pendharkar, C. Tsai, 1998, Proceedings of the 10th International Symposium on Power Semiconductor Devices and ICs. ISPSD'98 (IEEE Cat. No.98CH36212).

High-Voltage Drain Extended MOS Transistors for 0.18 um Logic CMOS Process

H. Shichijo, D. Mosher, T. Efland, 2000, 30th European Solid-State Device Research Conference.

SCR-LDMOS. A novel LDMOS device with ESD robustness

Taylor R. Efland, C.-Y. Tsai, Sameer Pendharkar, 2000, 12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094).

Robust 80 V LDMOS and 100 V DECMOS in a streamlined SOI technology for analog power applications

Taylor R. Efland, C.-Y. Tsai, Steven L. Merchant, 2002, Proceedings of the 14th International Symposium on Power Semiconductor Devices and Ics.

Avalanche-induced thermal instability in Ldmos transistors

Taylor R. Efland, Sameer Pendharkar, Steven L. Merchant, 2001, Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216).