H. Kawaguchi

发表

Conformable, flexible, large-area networks of pressure and thermal sensors with organic transistor active matrixes.

T. Someya, Y. Kato, T. Sekitani, 2005, Proceedings of the National Academy of Sciences of the United States of America.

Zigzag super cut-off CMOS (ZSCCMOS) block activation with self-adaptive voltage level controller: an alternative to clock-gating scheme in leakage dominant era

H. Kawaguchi, T. Sakurai, K. Min, 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..

A large-area flexible wireless power transmission sheet using printed plastic MEMS switches and organic field-effect transistors

T. Someya, Y. Kato, T. Sekitani, 2006, 2006 International Electron Devices Meeting.

. 7 10 . 7 1 . 27 Gb / s / pin 3 mW / pin Wireless Superconnect ( WSC ) Interface Scheme

H. Kawaguchi, T. Sakurai, T. Kuroda, 2003 .

A flexible, lightweight Braille sheet display with plastic actuators driven by an organic field-effect transistor active matrix

T. Someya, Y. Kato, T. Sekitani, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

A sheet-type scanner based on a 3D stacked organic-transistor circuit with double word-line and double bit-line structure

T. Someya, Y. Kato, T. Sekitani, 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

Integration of organic FETs with organic photodiodes for a large area, flexible, and lightweight sheet image scanners

T. Someya, Y. Kato, T. Sekitani, 2005, IEEE Transactions on Electron Devices.

A large-area, flexible, and lightweight sheet image scanner integrated with organic field-effect transistors and organic photodiodes

T. Someya, Y. Kato, T. Sekitani, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

A 3-D-Stack Organic Sheet-Type Scanner with Double-Wordline and Double-Bitline Structure

T. Someya, Y. Kato, T. Sekitani, 2006, IEEE Sensors Journal.

A Vth-Variation-Tolerant SRAM with 0.3-V Minimum Operation Voltage for Memory-Rich SoC Under DVS Environment

J. Miyakoshi, M. Yoshimoto, H. Kawaguchi, 2006, 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers..

Managing Subthreshold Leakage in Charge-Based Analog Circuits With Low- Transistors by Analog T- Switch (AT-Switch) and Super Cut-off

H. Kawaguchi, T. Sakurai, A. Tamtrakarn, 2006 .

A 0.56-V 128kb 10T SRAM using column line assist (CLA) scheme

Shunsuke Okumura, Shusuke Yoshimoto, Masahiko Yoshimoto, 2009, 2009 10th International Symposium on Quality Electronic Design.

Normally Off ECG SoC With Non-Volatile MCU and Noise Tolerant Heartbeat Detector

Hiroshi Nakajima, Shusuke Yoshimoto, Shintaro Izumi, 2015, IEEE Transactions on Biomedical Circuits and Systems.

A 298-fJ/writecycle 650-fJ/readcycle 8T three-port SRAM in 28-nm FD-SOI process technology for image processor

Shusuke Yoshimoto, Shintaro Izumi, Masahiko Yoshimoto, 2015, 2015 IEEE Custom Integrated Circuits Conference (CICC).

Multimodal cardiovascular information monitor using piezoelectric transducers for wearable healthcare

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2017, 2017 IEEE International Workshop on Signal Processing Systems (SiPS).

IsochronousMAC usingLong-Wave Standard Time Code forWirelessSensorNetworks

Masahiko Yoshimoto, Hiroshi Kawaguchi, Chikara Ohta, 2006 .

A low power, VLSI object recognition processor using Sparse FIND feature for 60 fps HDTV resolution video [IEICE Electronics Express Vol. 14(2017) No. 15 pp. 20170668]

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2018, IEICE Electronics Express.

Coupling-driven bus design-power application-specific systems

H. Kawaguchi, T. Sakurai, Youngsoo Shin, 2002 .

SRAM Failure Injection to a Vehicle ECU and Its Behavior Evaluation

H. Kawaguchi, M. Yoshimoto, S. Oho, 2013 .

A 11.3-µA Physical Activity Monitoring System Using Acceleration and Heart Rate

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2018, IEICE transactions on electronics.

Low-power metabolic equivalents estimation algorithm using adaptive acceleration sampling.

H. Kawaguchi, M. Yoshimoto, S. Izumi, 2016, Conference proceedings : ... Annual International Conference of the IEEE Engineering in Medicine and Biology Society. IEEE Engineering in Medicine and Biology Society. Annual Conference.

Cut-and-paste customization of organic FET integrated circuit and its application to electronic artificial skin

T. Sakurai, H. Kawaguchi, T. Sekitani, 2005, IEEE Journal of Solid-State Circuits.

A large-area, flexible pressure sensor matrix with organic field-effect transistors for artificial skin applications.

Takao Someya, Takayasu Sakurai, Tsuyoshi Sekitani, 2004, Proceedings of the National Academy of Sciences of the United States of America.

Time-Dependent Degradation in Device Characteristics and Countermeasures by Design

Masahiko Yoshimoto, Masanori Hashimoto, Shuhei Tanakamaru, 2018, VLSI Design and Test for Systems Dependability.

A 75-variable MIQP solver processor for real-time autonomous robot control

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2011, 2011 IEEE/SICE International Symposium on System Integration (SII).

A Low-Power Photoplethysmography Sensor using Correlated Double Sampling and Reference Readout Circuit

Shintaro Izumi, Masahiko Yoshimoto, Yuji Yano, 2019, 2019 IEEE SENSORS.

Low-power metabolic equivalents estimation algorithm using adaptive acceleration sampling

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2016, 2016 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC).

Normally-off technologies for healthcare appliance

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2014, 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC).

A 38 μA wearable biosignal monitoring system with near field communication

Hiroshi Nakajima, Shintaro Izumi, Masahiko Yoshimoto, 2013, 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS).

Effectiveness of the heartbeat interval error and compensation method on heart rate variability analysis

H. Kawaguchi, M. Yoshimoto, S. Izumi, 2022, Healthcare technology letters.

A Heartbeat Interval Error Compensation Method Using Multiple Linear Regression for Photoplethysmography Sensors

Shintaro Izumi, Masahiko Yoshimoto, Seiya Yoshida, 2019, 2019 IEEE Biomedical Circuits and Systems Conference (BioCAS).

Sampling Rate Reduction for Wearable Heart Rate Variability Monitoring

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

A Wearable Healthcare System With a 13.7 $\mu$ A Noise Tolerant ECG Processor

Hiroshi Nakajima, Shintaro Izumi, Masahiko Yoshimoto, 2015, IEEE Transactions on Biomedical Circuits and Systems.

Noise Tolerant Heart Rate Extraction Algorithm Using Short-Term Autocorrelation for Wearable Healthcare Systems

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2015, IEICE Trans. Inf. Syst..

A 14 µA ECG processor with robust heart rate monitor for a wearable healthcare system

Hiroshi Nakajima, Shintaro Izumi, Masahiko Yoshimoto, 2013, 2013 Proceedings of the ESSCIRC (ESSCIRC).

Noise-tolerant instantaneous heart rate and R-peak detection using short-term autocorrelation for wearable healthcare systems

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2013, 2013 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC).

Instantaneous Heart Rate detection using short-time autocorrelation for wearable healthcare systems

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2012, 2012 Annual International Conference of the IEEE Engineering in Medicine and Biology Society.

Non-Contact Instantaneous Heart Rate Extraction System Using 24-GHz Microwave Doppler Sensor

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2019, IEICE Trans. Commun..

Use of laser drilling in the manufacture of organic inverter circuits

T. Someya, Y. Kato, T. Sekitani, 2005, Analytical and bioanalytical chemistry.

Multimodal Cardiovascular Information Monitor Using Piezoelectric Transducers for Wearable Healthcare

H. Kawaguchi, M. Yoshimoto, S. Izumi, 2018, Journal of Signal Processing Systems.

Leakage-suppressed clock-gating circuit with Zigzag Super Cut-off CMOS (ZSCCMOS) for leakage-dominant sub-70-nm and sub-1-V-V/sub DD/ LSIs

Hiroshi Kawaguchi, Takayasu Sakurai, Kyeong-Sik Min, 2006, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Wearable pulse wave velocity sensor using flexible piezoelectric film array

Shusuke Yoshimoto, Shintaro Izumi, Masahiko Yoshimoto, 2017, 2017 IEEE Biomedical Circuits and Systems Conference (BioCAS).

A 15-μA metabolic equivalents monitoring system using adaptive acceleration sampling and normally off computing

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2016, 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Physical activity group classification algorithm using triaxial acceleration and heart rate

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2015, 2015 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC).

Control of threshold voltage of organic field-effect transistors with double-gate structures

Hiroshi Kawaguchi, Takao Someya, Takayasu Sakurai, 2005 .

Which is the best dual-port SRAM in 45-nm process technology? — 8T, 10T single end, and 10T differential —

H. Fujiwara, M. Yoshimoto, H. Kawaguchi, 2008, 2008 IEEE International Conference on Integrated Circuit Design and Technology and Tutorial.

High mobility of pentacene field-effect transistors with polyimide gate dielectric layers

Hiroshi Kawaguchi, Takao Someya, Takayasu Sakurai, 2004 .

Impact of aggregation efficiency on GIT routing for wireless sensor networks

Masahiko Yoshimoto, Hiroshi Kawaguchi, Chikara Ohta, 2006, 2006 International Conference on Parallel Processing Workshops (ICPPW'06).

Large displacement haptic stimulus actuator using piezoelectric pump for wearable devices

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2015, Annual International Conference of the IEEE Engineering in Medicine and Biology Society.

Low-power high-speed level shifter design for block-level dynamic voltage scaling environment

H. Kawaguchi, T. Sakurai, C.Q. Tran, 2005, 2005 International Conference on Integrated Circuit Design and Technology, 2005. ICICDT 2005..

Wearable Perspiration Volume Sensor Using Dual-Frequency Impedance Measurement

T. Sekitani, H. Kawaguchi, T. Araki, 2022, 2022 IEEE Sensors.

Introducing Multiple Microphone Arrays for Enhancing Smart Home Voice Control (応用音響)

Masahiko Yoshimoto, Hiroshi Kawaguchi, Masahide Nakamura, 2013 .

A 60-dB image rejection filter using Δ-Σ modulation and frequency shifting

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2009, 2009 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing.

An Organic FET SRAM for Braille Sheet Display with Back Gate to Increase Static Noise Margin

T. Someya, T. Sakurai, T. Sekitani, 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.

A sub-100-milliwatt dual-core HOG accelerator VLSI for real-time multiple object detection

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2013, 2013 IEEE International Conference on Acoustics, Speech and Signal Processing.

Energy-Efficient Spectral Analysis Method Using Autoregressive Model-Based Approach for Internet of Things

Shintaro Izumi, Masahiko Yoshimoto, Yuji Yano, 2019, IEEE Transactions on Circuits and Systems I: Regular Papers.

An Organic FET SRAM With Back Gate to Increase Static Noise Margin and Its Application to Braille Sheet Display

T. Someya, M. Takamiya, T. Sakurai, 2007, IEEE Journal of Solid-State Circuits.

VTH-hopping scheme to reduce subthreshold leakage for low-power processors

Hiroshi Kawaguchi, Seongsoo Lee, Takayasu Sakurai, 2002, IEEE J. Solid State Circuits.

Heartbeat Interval Error Compensation Method for Low Sampling Rates Photoplethysmography Sensors

Shintaro Izumi, Masahiko Yoshimoto, Yuji Yano, 2020, IEICE Trans. Commun..

Low-Noise Photoplethysmography Sensor Using Correlated Double Sampling for Heartbeat Interval Acquisition

Shintaro Izumi, Masahiko Yoshimoto, Yuji Yano, 2019, IEEE Transactions on Biomedical Circuits and Systems.

An Architectural Study for Inference Coprocessor Core at the Edge in IoT Sensing

Shintaro Izumi, Masahiko Yoshimoto, Kiyoshi Takeuchi, 2020, 2020 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS).

Radiation-Induced Soft Errors

Shusuke Yoshimoto, Hiroshi Kawaguchi, Yukio Mitsuyama, 2018, VLSI Design and Test for Systems Dependability.

Millimeter-Precision Ultrasonic DSSS Positioning Technique With Geometric Triangle Constraint

H. Kawaguchi, S. Izumi, Shun Sato, 2022, IEEE Sensors Journal.

Multiple-bit-upset and single-bit-upset resilient 8T SRAM bitcell layout with divided wordline structure

Shusuke Yoshimoto, Masahiko Yoshimoto, Hiroto Yasuura, 2011, 2011 IEEE 17th International On-Line Testing Symposium.

Design Solutions for a Multi-Object Wireless Power Transmission Sheet Based on Plastic Switches

Hiroshi Kawaguchi, Takao Someya, Takayasu Sakurai, 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

An Area-Conscious Low-Voltage-Oriented 8T-SRAM Design under DVS Environment

H. Fujiwara, M. Yoshimoto, H. Kawaguchi, 2007, 2007 IEEE Symposium on VLSI Circuits.

A Two-Port SRAM for Real-Time Video Processor Saving 53% of Bitline Power with Majority Logic and Data-Bit Reordering

Hidehiro Fujiwara, Koji Nii, Junichi Miyakoshi, 2006, ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design.

Novel Video Memory Reduces 45% of Bitline Power Using Majority Logic and Data-Bit Reordering

Masahiko Yoshimoto, Hidehiro Fujiwara, Koji Nii, 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Stacked-Chip Implementation of On-Chip Buck Converter for Distributed Power Supply System in SiPs

K. Inagaki, M. Takamiya, T. Sakurai, 2007, IEEE Journal of Solid-State Circuits.

Bit error rate estimation in SRAM considering temperature fluctuation

H. Kawaguchi, M. Yoshimoto, S. Okumura, 2012, Thirteenth International Symposium on Quality Electronic Design (ISQED).

A reduced clock-swing flip-flop (RCSFF) for 63% power reduction

Hiroshi Kawaguchi, Takayasu Sakurai, H. Kawaguchi, 1998, IEEE J. Solid State Circuits.

A super cut-off CMOS (SCCMOS) scheme for 0.5-V supply voltage with picoampere stand-by current

T. Sakurai, H. Kawaguchi, K. Nose, 2000, IEEE Journal of Solid-State Circuits.

A 40-nm 256-Kb 0.6-V operation half-select resilient 8T SRAM with sequential writing technique enabling 367-mV VDDmin reduction

Shunsuke Okumura, Shusuke Yoshimoto, Masahiko Yoshimoto, 2012, Thirteenth International Symposium on Quality Electronic Design (ISQED).

Delay and noise formulas for capacitively coupled distributed RC lines

Hiroshi Kawaguchi, Takayasu Sakurai, H. Kawaguchi, 1998, Proceedings of 1998 Asia and South Pacific Design Automation Conference.

Neutron-induced soft error rate estimation for SRAM using PHITS

Shusuke Yoshimoto, Shintaro Izumi, Masahiko Yoshimoto, 2012, 2012 IEEE 18th International On-Line Testing Symposium (IOLTS).

Parallel-processing VLSI architecture for mixed integer linear programming

Masahiko Yoshimoto, Hiroshi Kawaguchi, Hiroki Noguchi, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

Estimating metabolic equivalents for activities in daily life using acceleration and heart rate in wearable devices

H. Kawaguchi, Shigeho Tanaka, M. Yoshimoto, 2018, BioMedical Engineering OnLine.

A variation-aware 0.57-V set-associative cache with mixed associativity using 7T/14T SRAM

M. Yoshimoto, H. Kawaguchi, S. Okumura, 2012, 2012 IEEE Faible Tension Faible Consommation.

A 1.15-TOPS 6.57-TOPS/W Neural Network Processor for Multi-Scale Object Detection With Reduced Convolutional Operations

Shintaro Izumi, Masahiko Yoshimoto, Daisuke Watanabe, 2020, IEEE Journal of Selected Topics in Signal Processing.

SRAM Enabling Low-Energy Instantaneous Block Copy and Its Application to Transactional Memory

Yuki Kagiyama, Shunsuke Okumura, Shusuke Yoshimoto, 2011 .

Architectural Study of HOG Feature Extraction Processor for Real-Time Object Detection

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2012, 2012 IEEE Workshop on Signal Processing Systems.

An FPGA Implementation of a HOG-based Object Detection Processor

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2013, IPSJ Trans. Syst. LSI Des. Methodol..

7T SRAM enabling low-energy simultaneous block copy

Shunsuke Okumura, Shusuke Yoshimoto, Yohei Nakata, 2010, IEEE Custom Integrated Circuits Conference 2010.

A Low-Power Multi Resolution Spectrum Sensing Architecture for a Wireless Sensor Network with Cognitive Radio

H. Kawaguchi, M. Yoshimoto, S. Izumi, 2011, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Doppler shift compensation technique for ultrasonic DSSS ranging system

Shintaro Izumi, Toru Ishii, Hiroshi Kawaguchi, 2020, 2020 IEEE International Instrumentation and Measurement Technology Conference (I2MTC).

Subcentimeter Precision Ranging System for Moving Targets With a Doppler-Effect- Compensated Ultrasonic Direct Sequence Spread Spectrum

Shintaro Izumi, Hiroshi Kawaguchi, Yukiko Yoshikawa, 2021, IEEE Transactions on Instrumentation and Measurement.

Low-Power Low-Leakage FPGA Design Using Zigzag Power Gating, Dual-VTH/VDD and Micro-VDD-Hopping

Hiroshi Kawaguchi, Takayasu Sakurai, Canh Quang Tran, 2006, IEICE Trans. Electron..

95% Leakage-Reduced FPGA using Zigzag Power-gating, Dual-VTH/VDD and Micro-VDD-Hopping

H. Kawaguchi, T. Sakurai, C.Q. Tran, 2005, 2005 IEEE Asian Solid-State Circuits Conference.

More than two orders of magnitude leakage current reduction in look-up table for FPGAs

Hiroshi Kawaguchi, Takayasu Sakurai, Canh Quang Tran, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Noise tolerant QRS detection using template matching with short-term autocorrelation

Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2014, 2014 36th Annual International Conference of the IEEE Engineering in Medicine and Biology Society.

A 10T Non-Precharge Two-Port SRAM for 74% Power Reduction in Video Processing

Masahiko Yoshimoto, Hidehiro Fujiwara, Koji Nii, 2007, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07).

Development of the High-Power, Low-Emission Engine for the “Honda S2000”

Hiroshi Kawaguchi, Yutaka Otobe, H. Kawaguchi, 2000 .

Cut-and-paste organic FET customized ICs for application to artificial skin

T. Someya, H. Kawaguchi, T. Sakurai, 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).

Soft-Error Resilient and Margin-Enhanced N-P Reversed 6T SRAM Bitcell

Shusuke Yoshimoto, Masahiko Yoshimoto, Hiroshi Kawaguchi, 2014, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..