Akhilesh Kumar

发表

Application-to-core mapping policies to reduce memory system interference in multi-core systems

Reetuparna Das, Rachata Ausavarungnirun, Onur Mutlu, 2013, 2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA).

Integration Challenges and Tradeoffs for Tera-scale Architectures I l ® chnology

Akhilesh Kumar, D. Jayasimha, Seungjoon Park, 2007 .

Design of Low Power Low Noise Biquad Gic Notch Filter in 0.18 Μm Cmos Technology

Bhanu Pratap Singh Dohare, Akhilesh Kumar, Jyoti Athiya, 2011 .

DETERMINE COHESION AND COUPLING FOR CLASS DIAGRAM THROUGH SLICING TECHNIQUES

Akhilesh Kumar, S. K. Khalsa, 2012 .

Performance evaluation of IP network and MPLS network using NS2 simulator

Vinay Kumar, Rakesh Kumar, Rakesh Kumar Singh, 2015, 2015 International Conference on Futuristic Trends on Computational Analysis and Knowledge Management (ABLAZE).

A Novel approach : Security measures and Concerns of Cloud Computing

Akhilesh Kumar, Vinay Kumar, Awadhesh Kumar, 2012 .

Eecient Implementation of Cache Coherence in Scalable Shared Memory Multiprocessors

Akhilesh Kumar, 2007 .

On-chip Interconnect Trade-offs for Tera-scale Many-core Processors

Donglai Dai, Akhilesh Kumar, Mani Azimi, 2010 .

Performance analysis of 2-D inverse fast cosine transform employing multiprocessors

Rabi N. Mahapatra, B. N. Chatterji, Biswanath N. Chatterji, 1997, IEEE Trans. Signal Process..

Intel 870: a building block for cost-effective, scalable servers

Faye A. Briggs, Chitra Natarajan, Akhilesh Kumar, 2002, IEEE Micro.

Experience with Applying Formal Methods to Protocol Specification and System Architecture

Victor W. Lee, Seungjoon Park, Akhilesh Kumar, 2003, Formal Methods Syst. Des..

Cascade Lake: Next Generation Intel Xeon Scalable Processor

Akhilesh Kumar, Ian M. Steiner, Lily Pao Looi, 2019, IEEE Micro.

VALLEY BASED VERTICAL PARTITIONING IN DISTRIBUTED DATABASE

Akhilesh Kumar, Sumti Medhavi, Akhilesh Kumar, 2015 .

Evaluating virtual channels for cache-coherent shared-memory multiprocessors

Laxmi N. Bhuyan, Akhilesh Kumar, Akhilesh Kumar, 1996, ICS '96.

A Distributed Cache Coherence Protocol for Hypercube Multiprocessors

Laxmi N. Bhuyan, Akhilesh Kumar, Yeimkuan Chang, 1994, 1994 International Conference on Parallel Processing Vol. 1.

Application-to-core mapping policies to reduce memory interference in multi-core systems

Reetuparna Das, Rachata Ausavarungnirun, Onur Mutlu, 2012, 2012 21st International Conference on Parallel Architectures and Compilation Techniques (PACT).

Dual-Vt design of FPGAs for subthreshold leakage tolerance

Mohab Anis, Akhilesh Kumar, Akhilesh Kumar, 2006, 7th International Symposium on Quality Electronic Design (ISQED'06).

CAD Techniques for Robust FPGA Design Under Variability

Akhilesh Kumar, Akhilesh Kumar, 2010 .

FPGA Design for Timing Yield Under Process Variations

Mohab Anis, Akhilesh Kumar, Akhilesh Kumar, 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

IR-Drop Aware Clustering Technique for Robust Power Grid in FPGAs

Mohab Anis, Akhilesh Kumar, Akhilesh Kumar, 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Robust FPGA Design under Variations

Mohab Anis, Akhilesh Kumar, Akhilesh Kumar, 2010, 2010 International Conference on Field Programmable Logic and Applications.

Interconnect design for FPGAs under process variations for leakage power yield

Mohab Anis, Akhilesh Kumar, Akhilesh Kumar, 2010, Proceedings of the 8th IEEE International NEWCAS Conference 2010.

IR-Drop Management in FPGAs

Mohab Anis, Akhilesh Kumar, Akhilesh Kumar, 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

IR-drop management CAD techniques in FPGAs for power grid reliability

Mohab Anis, Akhilesh Kumar, Akhilesh Kumar, 2009, 2009 10th International Symposium on Quality Electronic Design.

An analytical state dependent leakage power model for FPGAs

Mohab Anis, Akhilesh Kumar, Akhilesh Kumar, 2006, Proceedings of the Design Automation & Test in Europe Conference.

Dual-Threshold CAD Framework for Subthreshold Leakage Power Aware FPGAs

Mohab Anis, Akhilesh Kumar, Akhilesh Kumar, 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.