Jonathan Rose

Jonathan Rose, Joshua Fender, Jonathan Rose, 2003, Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT) (IEEE Cat. No.03EX798).

Temperature measurement and equilibrium dynamics of simulated annealing placements

Jonathan Rose, Wolfgang Klebsch, Jürgen Wolf, 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Detection and Correspondence Matching of Corneal Reflections for Eye Tracking Using Deep Learning

Jonathan Rose, Moshe Eizenman, Braiden Brousseau, 2021, 2020 25th International Conference on Pattern Recognition (ICPR).

Speed and area tradeoffs in cluster-based FPGA architectures

Vaughn Betz, Jonathan Rose, Alexander Marquardt, 2000, IEEE Trans. Very Large Scale Integr. Syst..

A stochastic model to predict the routability of field-programmable gate arrays

Jonathan Rose, Stephen Dean Brown, Zvonko G. Vranesic, 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Reconfigurable hardware implementation of a phase-correlation stereoalgorithm

W. James MacLean, Jonathan Rose, Ahmad Darabiha, 2006, Machine Vision and Applications.

Architecture and CAD for Deep-Submicron FPGAS

Vaughn Betz, Jonathan Rose, Alexander Marquardt, 1999, The Springer International Series in Engineering and Computer Science.

A detailed router for field-programmable gate arrays

Jonathan Rose, Stephen Dean Brown, Zvonko G. Vranesic, 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

The stratixπ routing and logic architecture

Vaughn Betz, Jonathan Rose, David Jefferson, 2003, FPGA '03.

Taking the tester out of the SDMT: A proof of concept fully automated approach to assessing processing speed in people with MS

Jonathan Rose, Anthony Feinstein, Viral Prakash Patel, 2018, Multiple sclerosis.

Cocreation of a conversational agent to help patients adhere to their varenicline treatment: A study protocol

Jonathan Rose, M. Ratto, P. Selby, 2023, Digital health.

Screening for Generalized Anxiety Disorder From Acoustic and Linguistic Features of Impromptu Speech: Prediction Model Evaluation Study

Jonathan Rose, D. DeSouza, Bazen Gashaw Teferra, 2022, JMIR formative research.

Video-rate stereo depth measurement on programmable hardware

W. James MacLean, Jonathan Rose, Ahmad Darabiha, 2003, 2003 IEEE Computer Society Conference on Computer Vision and Pattern Recognition, 2003. Proceedings..

The design of an SRAM-based field-programmable gate array. I. Architecture

P. Chow, Soon Ong Seo, J. Rose, 1999, IEEE Trans. Very Large Scale Integr. Syst..

VPR: A new packing, placement and routing tool for FPGA research

Vaughn Betz, Jonathan Rose, Jonathan Rose, 1997, FPL.

The Design of an SRAM-Based Field-Programmable Gate Array — Part I : Architecture

Jonathan Rose, Paul Chow, Kevin Chung, 1999 .

Parallel standard cell placement algorithms with quality equivalent to simulated annealing

Jonathan Rose, W. Martin Snelgrove, Zvonko G. Vranesic, 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Architecture description and packing for logic blocks with hierarchy, modes and complex interconnect

Jason Luu, Jason Helge Anderson, Jonathan Rose, 2011, FPGA '11.

The Stratix II logic and routing architecture

Vaughn Betz, Jonathan Rose, David M. Lewis, 2005, FPGA '05.

Using cluster-based logic blocks and timing-driven packing to improve FPGA speed and density

Vaughn Betz, Jonathan Rose, Alexander Marquardt, 1999, FPGA '99.

Predicting Generalized Anxiety Disorder From Impromptu Speech Transcripts Using Context-Aware Transformer-Based Neural Networks: Model Evaluation Study

Jonathan Rose, Bazen Gashaw Teferra, 2022, JMIR Mental Health.

Automated Screening for Social Anxiety, Generalized Anxiety, and Depression From Objective Smartphone-Collected Data: Cross-sectional Study

Jonathan Rose, M. Katzman, Daniel Di Matteo, 2021, Journal of medical Internet research.

Quantifying and Exploring the Gap Between FPGAs and ASICs

Jonathan Rose, Ian Kuon, Jonathan Rose, 2009 .

The Relationship Between Smartphone-Recorded Environmental Audio and Symptomatology of Anxiety and Depression: Exploratory Study (Preprint)

Jonathan Rose, M. Katzman, Daniel Di Matteo, 2020 .

Comparing FPGA vs. custom cmos and the impact on processor microarchitecture

Vaughn Betz, Jonathan Rose, Henry Wong, 2011, FPGA '11.

Energy efficient object detection on the mobile GP-GPU

Jonathan Rose, Valeria Bertacco, Todd Austin, 2017, 2017 IEEE AFRICON.

Characterization and parameterized generation of synthetic combinational benchmark circuits

J. P. Grossman, Jonathan Rose, Mike Hutton, 1998, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Definition And Solution Of The Memory Packing Problem For Field-programmable Systems

Jonathan Rose, David Karchmer, Jonathan Rose, 1994, IEEE/ACM International Conference on Computer-Aided Design.

FPGA Architecture: Survey and Challenges

Jonathan Rose, Ian Kuon, R. Tessier, 2008, Found. Trends Electron. Des. Autom..

Enhancing the area-efficiency of FPGAs with hard circuits using shadow clusters

Jonathan Rose, Peter Jamieson, Jonathan Rose, 2006, 2006 IEEE International Conference on Field Programmable Technology.

Using bus-based connections to improve field-programmable gate-array density for implementing datapath circuits

Jonathan Rose, Andy Gean Ye, Jonathan Rose, 2005, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Nearest neighbour interconnect architecture in deep submicron FPGAs

Jonathan Rose, A. Roopchansingh, Jonathan Rose, 2002, Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285).

Mixing buffers and pass transistors in FPGA routing architectures

Jonathan Rose, Mike Sheng, Jonathan Rose, 2001, FPGA '01.

Circuit design, transistor sizing and wire layout of FPGA interconnect

Vaughn Betz, Jonathan Rose, Jonathan Rose, 1999, Proceedings of the IEEE 1999 Custom Integrated Circuits Conference (Cat. No.99CH36327).

FPGA routing architecture: segmentation and buffering to optimize speed and density

Vaughn Betz, Jonathan Rose, Jonathan Rose, 1999, FPGA '99.

An SRAM-programmable field-configurable memory

Steven J. E. Wilton, Jonathan Rose, T. Ngai, 1995, Proceedings of the IEEE 1995 Custom Integrated Circuits Conference.

Architecture of Centralized Field-Configurable Memory

Steven J. E. Wilton, Jonathan Rose, Zvonko G. Vranesic, 1995, Third International ACM Symposium on Field-Programmable Gate Arrays.

Advantages of heterogeneous logic block architecture for FPGAs

Jonathan Rose, Jian-She He, Jonathan Rose, 1993, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.

Architecture of field-programmable gate arrays: the effect of logic block functionality on area efficiency

Jonathan Rose, Paul Chow, David Lewis, 1990 .

The effect of logic block complexity on area of programmable gate arrays

Jonathan Rose, Paul Chow, David Lewis, 1989, 1989 Proceedings of the IEEE Custom Integrated Circuits Conference.

How Much Logic Should Go in an FPGA Logic Block?

Vaughn Betz, Jonathan Rose, Jonathan Rose, 1998, IEEE Des. Test Comput..

Field-Programmable Gate Arrays

Zvonko G. Vranesic, Stephen D. Brown, Robert J. Francis, 1992 .

Introduction to FPGAs

Jonathan Rose, Zvonko G. Vranesic, Stephen D. Brown, 1992 .

SmartEye: An Accurate Infrared Eye Tracking System for Smartphones

Jonathan Rose, Moshe Eizenman, Braiden Brousseau, 2018, 2018 9th IEEE Annual Ubiquitous Computing, Electronics & Mobile Communication Conference (UEMCON).

A Motivational Interviewing Chatbot With Generative Reflections for Increasing Readiness to Quit Smoking: Iterative Development Study

Jonathan Rose, M. Ratto, Ashwani Kumar, 2023, JMIR mental health.

A parameterized automatic cache generator for FPGAs

Jonathan Rose, Peter Yiannacouras, Jonathan Rose, 2003, Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT) (IEEE Cat. No.03EX798).

Exploration and Customization of FPGA-Based Soft Processors

Jonathan Rose, J. Gregory Steffan, Peter Yiannacouras, 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Chortle: a technology mapping program for lookup table-based field programmable gate arrays

Jonathan Rose, Robert J. Francis, Kevin Chung, 1990, 27th ACM/IEEE Design Automation Conference.

The effect of switch box flexibility on routability of field programmable gate arrays

Stephen D. Brown, Jonathan Rose, Jonathan Rose, 1990, IEEE Proceedings of the Custom Integrated Circuits Conference.

Automatic generation of FPGA routing architectures from high-level descriptions

Vaughn Betz, Jonathan Rose, Jonathan Rose, 2000, FPGA '00.

A hybrid complete-graph partial-crossbar routing architecture for multi-FPGA systems

Jonathan Rose, Mohammed A. S. Khalid, Jonathan Rose, 1998, FPGA '98.

Portable, Flexible, and Scalable Soft Vector Processors

Jonathan Rose, J. Gregory Steffan, Peter Yiannacouras, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Fine-grain performance scaling of soft vector processors

Jonathan Rose, J. Gregory Steffan, Peter Yiannacouras, 2009, CASES '09.

VESPA: portable, scalable, and flexible FPGA-based vector processors

Jonathan Rose, J. Gregory Steffan, Peter Yiannacouras, 2008, CASES '08.

Portable, Flexible, and Scalable Soft

Jonathan Rose, J. Gregory Steffan, Peter Yiannacouras, 2012 .

A fast routability-driven router for FPGAs

Vaughn Betz, Jonathan Rose, Jordan S. Swartz, 1998, FPGA '98.

VTR 7.0: Next Generation Architecture and CAD System for FPGAs

Sen Wang, Kenneth B. Kent, Vaughn Betz, 2014, TRETS.

Portable and Scalable FPGA-Based Acceleration of a Direct Linear

Jonathan Rose, Vaughn Betz, System Solver, 2012 .

Structural analysis and generation of synthetic digital circuits with memory

Steven J. E. Wilton, Jonathan Rose, Zvonko G. Vranesic, 2001, IEEE Trans. Very Large Scale Integr. Syst..

Timing-driven placement for FPGAs

Vaughn Betz, Jonathan Rose, Alexander Marquardt, 2000, FPGA '00.

Hybrid Eye-Tracking on a Smartphone with CNN Feature Extraction and an Infrared 3D Model

Jonathan Rose, Moshe Eizenman, Braiden Brousseau, 2020, Sensors.

Automatic generation of synthetic sequential benchmark circuits

Jonathan Rose, Mike Hutton, Derek G. Corneil, 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Trading quality for compile time: ultra-fast placement for FPGAs

Jonathan Rose, Yaska Sankar, Jonathan Rose, 1999, FPGA '99.

The design of a SRAM-based field-programmable gate array-Part II: Circuit design and layout

P. Chow, Soon Ong Seo, J. Rose, 1999, IEEE Trans. Very Large Scale Integr. Syst..

BIS Working Papers No 298 Does monetary policy affect bank risk-taking ?

S. Ongena, Jonathan Rose, Ludger Schuknecht, 2010 .

Quantifying the Gap Between FPGA and Custom CMOS to Aid Microarchitectural Design

Vaughn Betz, Jonathan Rose, Henry Wong, 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Architecture and CAD for Deep-Submicron FPGAS

Jonathan Rose, A. Marquardt, Vaughn Betz, 1999, The Springer International Series in Engineering and Computer Science.

Towards interconnect-adaptive packing for FPGAs

Jason Luu, Jason Helge Anderson, Jonathan Rose, 2014, FPGA.

On the difficulty of pin-to-wire routing in FPGAs

Jonathan Rose, Niyati Shah, Jonathan Rose, 2012, 22nd International Conference on Field Programmable Logic and Applications (FPL).

Enhancing the Area Efficiency of FPGAs With Hard Circuits Using Shadow Clusters

Peter Jamieson, Jonathan Rose, Jonathan Rose, 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

VPR 5.0: FPGA cad and architecture exploration tools with single-driver routing, heterogeneity and process scaling

Jonathan Rose, Ian Kuon, P. Jamieson, 2009, FPGA '09.

Automated transistor sizing for FPGA architecture exploration

Jonathan Rose, Ian Kuon, Jonathan Rose, 2008, 2008 45th ACM/IEEE Design Automation Conference.

Area and delay trade-offs in the circuit and architecture design of FPGAs

Jonathan Rose, Ian Kuon, Jonathan Rose, 2008, FPGA '08.

Modeling routing demand for early-stage FPGA architecture development

Jonathan Rose, Wei Mark Fang, Jonathan Rose, 2008, FPGA '08.

Architecting Hard Crossbars on FPGAs and Increasing their Area Efficiency with Shadow Clusters

Jonathan Rose, Peter Jamieson, Jonathan Rose, 2007, 2007 International Conference on Field-Programmable Technology.

Enhancing the area-efficiency of FPGAs with hard circuits using shadow clusters

Jonathan Rose, P. Jamieson, 2006, 2006 IEEE International Conference on Field Programmable Technology.

Measuring and utilising the correlation between signal connectivity and signal positioning for FPGAs containing multi-bit building blocks

Jonathan Rose, A. Ye, 2006 .

Design, layout and verification of an FPGA using automated tools

Jonathan Rose, Ian Kuon, Aaron Egier, 2005, FPGA '05.

Using multi-bit logic blocks and automated packing to improve field-programmable gate array density for implementing datapath circuits

Jonathan Rose, Andy Gean Ye, Jonathan Rose, 2004, Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921).

Hard vs. soft: the central question of pre-fabricated silicon

Jonathan Rose, Jonathan Rose, 2004, Proceedings. 34th International Symposium on Multiple-Valued Logic.

Architecture of datapath-oriented coarse-grain logic and routing for FPGAs

A. Ye, J. Rose, L. David, 2003, Proceedings of the IEEE 2003 Custom Integrated Circuits Conference, 2003..

Automatic transistor and physical design of FPGA tiles from an architectural specification

Jonathan Rose, Ryan Fung, Ketan Padalia, 2003, FPGA '03.

Synthesizing datapath circuits for FPGAs with emphasis on area minimization

Jonathan Rose, David M. Lewis, Andy Ye, 2002, 2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings..

EVE: a CAD tool for manual placement and pipelining assistance of FPGA circuits

Jonathan Rose, William Chow, Jonathan Rose, 2002, FPGA '02.

Applications of clone circuits to issues in physical-design

Jonathan Rose, Mike Hutton, Jonathan Rose, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

ModelingRoutingDemandforEarly-StageFPGA ArchitectureDevelopment

Jonathan Rose, Wei Mark Fang, Jonathan Rose, 2008 .

Field-programmable gate array architectures and algorithms optimized for implementing datapath circuits

Jonathan Rose, David Lewis, Andy Ye, 2004 .

The Transmogrifier-2: a 1 million gate rapid prototyping system

Jonathan Rose, Paul Chow, David M. Lewis, 1997, FPGA '97.

Next-generation acceleration and code optimization for light transport in turbid media using GPUs

Stefan Andersson-Engels, Lothar Lilge, Jonathan Rose, 2010, Biomedical optics express.

Effect of the prefabricated routing track distribution on FPGA area-efficiency

Vaughn Betz, Jonathan Rose, Jonathan Rose, 1998, IEEE Trans. Very Large Scale Integr. Syst..

Engaging Unmotivated Smokers to Move Toward Quitting: Design of Motivational Interviewing–Based Chatbot Through Iterative Interactions (Preprint)

Jonathan Rose, P. Selby, Fahad Almusharraf, 2020 .