Young-Joon Lee

Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory)

Hsien-Hsin S. Lee, Xin Zhao, Sung Kyu Lim, 2015, IEEE Transactions on Computers.

Routing optimization of multi-modal interconnects in 3D ICs

Sung Kyu Lim, Young-Joon Lee, S. Lim, 2009, 2009 59th Electronic Components and Technology Conference.

TSV stress aware timing analysis with applications to 3D-IC layout optimization

Jae-Seok Yang, Sung Kyu Lim, David Z. Pan, 2010, Design Automation Conference.

Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory)

Gabriel H. Loh, Dong Hyuk Woo, D. L. Lewis, 2015, IEEE Transactions on Computers.

Co-Optimization and Analysis of Signal, Power, and Thermal Interconnects in 3-D ICs

Sung Kyu Lim, Young-Joon Lee, S. Lim, 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Thermal Characterization of Interlayer Microfluidic Cooling of Three-Dimensional Integrated Circuits With Nonuniform Heat Flux

Sung Kyu Lim, Andrei G. Fedorov, Young-Joon Lee, 2010 .

Ultrahigh Density Logic Designs Using Monolithic 3-D Integration

Sung Kyu Lim, Young-Joon Lee, S. Lim, 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Co-design of reliable signal and power interconnects in 3D stacked ICs

Sung Kyu Lim, Young-Joon Lee, Michael B. Healy, 2009, 2009 IEEE International Interconnect Technology Conference.

3D-MAPS: 3D Massively parallel processor with stacked memory

Hsien-Hsin S. Lee, Xin Zhao, Sung Kyu Lim, 2012, 2012 IEEE International Solid-State Circuits Conference.