H. Narayanan

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Submodular functions and electrical networks

H. Narayanan, 1997 .

A rounding technique for the polymatroid membership problem

H. Narayanan, 1995 .

Chapter 9 Submodular Functions

H. Narayanan, 1997 .

A Study on Checkpoint Compression for Adjoint Computation

H. Narayanan, Kai-yuan Hou, Navjot Kukreja, 2018 .

A new approach to the problem of PLA partitioning using the theory of the principal lattice of partitions of a submodular function

H. Narayanan, S. Roy, 1991, [1991] Proceedings Fourth Annual IEEE International ASIC Conference and Exhibit.

Calculating Reuse Distance from Source Code Sri

P. Hovland, H. Narayanan, 2016 .

Finding bipartition respecting natural dense clusters

A. S. Deshpande, H. Narayanan, S. Patkar, 2005 .

Mathematical Programming and Electrical Network Analysis II: Computational Linear Algebra through Network analysis

H. Narayanan, 2008 .

A Spectral Approach to Polytope Diameter

N. Srivastava, H. Narayanan, Rikhav Shah, 2021, ITCS.

Learning Mixtures of Spherical Gaussians via Fourier Analysis

H. Narayanan, Somnath Chakraborty, 2020, ArXiv.

Solution of Partial Differential Equations by electrical analogy

Sachin B. Patkar, Yogesh Dilip Save, H. Narayanan, 2011, J. Comput. Sci..

Fast On-Line/Off-Line Algorithms for Optimal Reinforcement of a Network and its Connections with Principal Partition

Sachin B. Patkar, H. Narayanan, H. Narayanan, 2000, J. Comb. Optim..

Approximation Algorithms for Min-k-Overlap Problems Using the Principal Lattice of Partitions Approach

Sachin B. Patkar, H. Narayanan, Subir Roy, 1994, J. Algorithms.

Principal Lattice of Partition of submodular functions on Graphs: Fast algorithms for Principal Partition and Generic Rigidity

Sachin B. Patkar, H. Narayanan, H. Narayanan, 1992, ISAAC.

Fast Sequential and Randomised Parallel Algorithms for Rigidity and approximate Min k-cut

Sachin B. Patkar, H. Narayanan, H. Narayanan, 1992, FSTTCS.

Spectral algorithm to compute and synthesize reduced order passive models for arbitrary RC multiports

H. Narayanan, Shabbir H. Batterywala, H. Narayanan, 2001, VLSI Design 2001. Fourteenth International Conference on VLSI Design.

Efficient DC analysis of RVJ circuits for moment and derivative computations of interconnect networks

H. Narayanan, Shabbir H. Batterywala, H. Narayanan, 1999, Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013).

FPGA Based High Performance Double-Precision Matrix Multiplication

Siddharth Joshi, Sachin B. Patkar, H. Narayanan, 2009, 2009 22nd International Conference on VLSI Design.

Randomized parallel algorithms for matroid union and intersection, with applications to arboresences and edge-disjoint spanning trees

Vijay V. Vazirani, Huzur Saran, H. Narayanan, 1992, SODA '92.

On the minimum hybrid rank of a graph relative to a partition of its edges and its application to electrical network analysis

H. Narayanan, H. Narayanan, 1990, Int. J. Circuit Theory Appl..

Improving graph partitions using submodular functions

Sachin B. Patkar, H. Narayanan, H. Narayanan, 2003, Discret. Appl. Math..

An efficient practical heuristic for good ratio-cut partitioning

Sachin B. Patkar, H. Narayanan, H. Narayanan, 2003, 16th International Conference on VLSI Design, 2003. Proceedings..

A new partitioning strategy based on supermodular functions

Sachin B. Patkar, H. Narayanan, Shabbir H. Batterywala, 1997, Proceedings Tenth International Conference on VLSI Design.

On the mixing time of coordinate Hit-and-Run

P. Srivastava, H. Narayanan, 2020, Comb. Probab. Comput..

The realization of finite state machines by decomposition and the principal lattice of partitions of a submodular function

Madhav P. Desai, Sachin B. Patkar, H. Narayanan, 2003, Discret. Appl. Math..

Application of DC Analyzer to Combinatorial Optimization Problems

Gaurav Trivedi, H. Narayanan, Sumit Punglia, 2007, 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07).

Fast loop matrix generation for hybrid analysis and a comparison of the sparsity of the loop impedance and MNA impedance submatrices

H. Narayanan, H. Narayanan, V.s. Ovalekar, 1992, [Proceedings] 1992 IEEE International Symposium on Circuits and Systems.

Implicit Linear Algebra and Basic Circuit Theory pdf

Hariharan Narayanan, H. Narayanan, H. Narayanan, 2020, ArXiv.

Solution of PDEs-electrically coupled systems with electrical analogy

Sachin B. Patkar, H. Narayanan, Yogesh Dilip Save, 2013, Integr..