P. Fazan

发表

A capacitor-less 1T-DRAM cell

S. Okhonin, M. Nagoga, J. Sallese, 2002, IEEE Electron Device Letters.

Assessment of SiGe quantum well transistors for DRAM peripheral applications

Naoto Horiguchi, Y. Son, Tom Schram, 2015, 2015 International Conference on IC Design & Technology (ICICDT).

Low-power DRAM-compatible Replacement Gate High-k/Metal Gate Stacks

R. Ritzenthaler, T. Schram, N. Horiguchi, 2013 .

Modeling of the depletion of the amorphous-silicon surface during hemispherical grained silicon formation

J. Sallese, P. Fazan, A. Ils, 2000 .

Endurance of One Transistor Floating Body RAM on UTBOX SOI

M. Jurczak, P. Fazan, M. Aoulaiche, 2014, IEEE Transactions on Electron Devices.

Impact of Channel Engineering Technology on HC Performance of 100 nm MOSFETs

S. Okhonin, P. Fazan, S. Kubicek, 2001, 31st European Solid-State Device Research Conference.

Switch and rf ferroelectric MEMS: a new concept

J. Sallese, P. Fazan, 2004 .

Inversion charge linearization in MOSFET modeling and rigorous derivation of the EKV compact model

Matthias Bucher, Francois Krummenacher, Jean-Michel Sallese, 2003 .

Accounting for quantum effects and polysilicon depletion from weak to strong inversion in a charge-based design-oriented MOSFET model

Matthias Bucher, Christophe Lallement, Jean-Michel Sallese, 2003 .

CMOS compatible fully integrated Mach-Zehnder interferometer in SOI technology

P. Fazan, A. Ionescu, M. Chabloz, 2000, IEEE Photonics Technology Letters.

Low-frequency noise assessment of border traps in Al2O3 capped DRAM peripheral MOSFETs

K. B. Noh, R. Ritzenthaler, T. Schram, 2014 .

Hot-carrier reliability characteristics of narrow-width MOSFETs

Jack C. Lee, H. Hwang, P. Fazan, 1993 .

Overview of Bias Temperature Instability in Scaled DRAM Logic for Memory Transistors

R. Ritzenthaler, N. Horiguchi, D. Linten, 2020, IEEE Transactions on Device and Materials Reliability.

Reliability Engineering Enabling Continued Logic for Memory Device Scaling

R. Ritzenthaler, N. Horiguchi, D. Linten, 2019, 2019 IEEE International Integrated Reliability Workshop (IIRW).

Derivation of Shockley-Read-Hall recombination rates in bulk and PD-SOI MOSFET's channels valid in all modes of operation

François Krummenacher, Jean-Michel Sallese, Pierre Fazan, 2004 .

Formation of high-quality oxide/nitride stacked layers on rugged polysilicon electrodes by rapid thermal oxidation

G. Lo, D. Kwong, P. Fazan, 1993 .

Highly reliable, high-C DRAM storage capacitors with CVD TA/sub 2/O/sub 5/ films on rugged polysilicon

G. Lo, D. Kwong, P. Fazan, 1993, IEEE Electron Device Letters.

Ultrathin oxide-nitride dielectrics for rugged stacked DRAM capacitors

P. Fazan, A. Ditali, V. K. Mathews, 1992, IEEE Electron Device Letters.

Dynamic-stress-induced dielectric breakdown in ultrathin nitride/oxide stacked films deposited on rugged polysilicon

G. Lo, D. Kwong, P. Fazan, 1992, IEEE Electron Device Letters.

Trapping, conduction, and dielectric breakdown in Si/sub 3/N/sub 4/ films on as-deposition rugged polysilicon

P. Fazan, V. K. Mathews, H. C. Chan, 1991, IEEE Electron Device Letters.

Trapping , Conduction, and Dielectric Breakdown in Si N, Films on As-Deposited Rugged Poly silicon

P. Fazan, V. K. Mathews, H. C. Chan, 1991 .

Thermal budget impact on HKMG Al2O3 and La gate stacks for advanced DRAM periphery transistors

R. Ritzenthaler, T. Schram, N. Horiguchi, 2014, 2014 IEEE Workshop On Microelectronics And Electron Devices (WMED).

A new high-k/metal gate CMOS integration scheme (Diffusion and Gate Replacement) suppressing gate height asymmetry and compatible with high-thermal budget memory technologies

E. Simoen, R. Ritzenthaler, N. Horiguchi, 2014, 2014 IEEE International Electron Devices Meeting.

Gate-Stack Engineered NBTI Improvements in Highvoltage Logic-For-Memory High-ĸ/Metal Gate Devices

Naoto Horiguchi, Dimitri Linten, Tibor Grasser, 2019, 2019 IEEE International Reliability Physics Symposium (IRPS).

Impact of Dimensions of Memory Periphery FinFETs on Bias Temperature Instability

R. Ritzenthaler, N. Horiguchi, D. Linten, 2020, IEEE Transactions on Device and Materials Reliability.

Impact of Fin Height on Bias Temperature Instability of Memory Periphery FinFETs

R. Ritzenthaler, N. Horiguchi, D. Linten, 2019, 2019 IEEE International Integrated Reliability Workshop (IIRW).

Gate stack engineering to enhance high-κ/metal gate reliability for DRAM I/O applications

R. Ritzenthaler, T. Schram, A. Chasin, 2017, 2017 IEEE International Reliability Physics Symposium (IRPS).

Nitridation of thin SiO2 films in N2 and NH3 plasmas

P. Fazan, M. Dutoit, M. Ilegems, 1987 .

Low-Frequency Noise Assessment of the Oxide Trap Density in Thick-Oxide Input-Output Transistors for DRAM Applications

R. Ritzenthaler, T. Schram, N. Horiguchi, 2016 .

Thermal stability of thin poly‐Si/Ta2O5/TiN capacitors for dynamic random access memory applications

P. Fazan, G. Sandhu, N. Parikh, 1994 .

Effects of surface pretreatment of polysilicon electrode prior to Si/sub 3/N/sub 4/ deposition on the electrical characteristics of Si/sub 3/N/sub 4/ dielectric films

D. Kwong, P. Fazan, A. Joshi, 1994 .

Advanced Dram Cell Dielectric Films using Rapid Thermal Processing

P. Fazan, V. K. Mathews, R. Thakur, 1994 .

Influence of Surface Preparation Prior to Thermal Nitridation on the Electrical Characteristics of Silicon Nitride Films Deposited on Polycrystalline Silicon Films

P. Fazan, A. Ditali, V. K. Mathews, 1992 .

Bias Temperature Instability (BTI) of High-Voltage Devices for Memory Periphery

R. Ritzenthaler, A. Chasin, N. Horiguchi, 2022, 2022 IEEE International Reliability Physics Symposium (IRPS).

Charge trapping and breakdown in thin SiO2 polysilicon-gate MOS capacitors☆

J. Moret, P. Fazan, M. Dutoit, 1987 .

Two-band tunneling currents in metal-oxide-semiconductor capacitors at the transition from direct to Fowler–Nordheim tunneling regime

S. Okhonin, P. Fazan, S. Deleonibus, 1999 .

Insights in low frequency noise of advanced and high-mobility channel transistors

A. Veloso, M. Jurczak, P. Fazan, 2012, 2012 International Electron Devices Meeting.

Trends in the development of ULSI DRAM capacitors

P. Fazan, 1994 .

Degradation of junction leakage in devices subjected to gate oxidation in nitrous oxide (MOS transistors)

P. Fazan, R. Maddox, V. K. Mathews, 1992, IEEE Electron Device Letters.

Buffer layer dependence of memory effects for SrBi2Ta2O9 on Si

M. Cantoni, T. Ma, J. Sallese, 2001 .

Transmission electron microscope investigation of SrBi2Ta2O9 memory capacitors on Si with silicon dioxide and silicon nitride as buffers

M. Cantoni, T. Ma, J. Sallese, 2000 .

Physical and electrical characterization of poly buffered LOCOS isolation process for sub 0.5 mu m ULSI technology

P. Fazan, R. Maddox, V. K. Mathews, 1993 .

CMOS integration of high-k/metal gate transistors in diffusion and gate replacement (D&GR) scheme for dynamic random access memory peripheral circuits

Naoto Horiguchi, Tom Schram, Farid Sebaai, 2018 .

Bridge-gap buried digit-line for high density stacked DRAMs

Detlef Becker, Kevin K. Chan, Pierre Fazan, 1991, [1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium.

Use of scanning capacitance microscopy for controlling wafer processing

A. Acovic, K. Kern, P. Fazan, 2002, Microelectron. Reliab..

Hot-carrier reliability in double-implanted lightly doped drain devices for advanced DRAMs

P. Fazan, A. Ditali, I. Khan, 1992 .

Electrical modeling of a pressure sensor MOSFET

W. Grabinski, Jean-Michel Sallese, Pierre Fazan, 2001 .

Constant-current study of dielectric breakdown of Pb(Zr,Ti)O3 ferroelectric film capacitors

D. Wouters, A. Tagantsev, S. Okhonin, 2001 .

Dielectric breakdown in (Pb,La)(Zr,Ti)O3 ferroelectric thin films with Pt and oxide electrodes

A. Tagantsev, S. Okhonin, P. Fazan, 2000 .

Low-frequency noise of advanced memory devices

E. Simoen, C. Claeys, R. Ritzenthaler, 2015, 2015 International Conference on Noise and Fluctuations (ICNF).

Impact of thermal budget on the low-frequency noise of DRAM peripheral nMOSFETs

R. Ritzenthaler, T. Schram, N. Horiguchi, 2015, 2015 China Semiconductor Technology International Conference.

A Low-Power HKMG CMOS Platform Compatible With Dram Node 2× and Beyond

Naoto Horiguchi, Wilfried Vandervorst, Tom Schram, 2014, IEEE Transactions on Electron Devices.

Low-frequency noise analysis of DRAM peripheral transistors with La cap

R. Ritzenthaler, T. Schram, N. Horiguchi, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Impact of Al2O3 position on performances and reliability in high-k metal gated DRAM periphery transistors

Naoto Horiguchi, Eddy Simoen, Aaron Thean, 2013, 2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC).

A simple 1-transistor capacitor-less memory cell for high performance embedded DRAMs

Jean-Michel Sallese, Pierre Fazan, Serguei Okhonin, 2002, Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285).

A SOI capacitor-less 1T-DRAM concept

Jean-Michel Sallese, Pierre Fazan, Serguei Okhonin, 2001, 2001 IEEE International SOI Conference. Proceedings (Cat. No.01CH37207).

Principles of transient charge pumping on partially depleted SOI MOSFETs

S. Okhonin, M. Nagoga, P. Fazan, 2002, IEEE Electron Device Letters.

Charge generation in thin SiO2 polysilicon-gate MOS capacitors

Marc Ilegems, Pierre Fazan, M. Dutoit, 1987 .

Novel technique for nanograin ultra-thin polysilicon film deposition and implantation

Adrian M. Ionescu, Pierre Fazan, Serge Ecoffey, 2003, 2003 International Semiconductor Conference. CAS 2003 Proceedings (IEEE Cat. No.03TH8676).

Improving the low-frequency noise performance of input/output DRAM peripheral pMOSFETs

R. Ritzenthaler, T. Schram, N. Horiguchi, 2017, 2017 International Conference on Noise and Fluctuations (ICNF).

Modeling the polarization in ferroelectric materials: A novel analytical approach

J. Sallese, P. Fazan, D. Bard, 2003 .

Highly reliable SiO/sub 2//Si/sub 3/N/sub 4/ stacked dielectric on rapid-thermal-nitrided rugged polysilicon for high-density DRAM's

G. Lo, D. Kwong, P. Fazan, 1992, IEEE Electron Device Letters.

Hot-carrier-induced degradation of gate dielectrics grown in nitrous oxide under accelerated aging

A. Ditali, P. Fazan, P. Fazan, 1992, IEEE Electron Device Letters.

Understanding and optimizing the floating body retention in FDSOI UTBOX

Cor Claeys, Eddy Simoen, Marc Aoulaiche, 2016 .

Capacitorless 1T DRAM sensing scheme with automatic reference generation

M.J. Declercq, M. Pastre, M. Blagojevic, 2006, IEEE Journal of Solid-State Circuits.

A new block refresh concept for SOI floating body memories

S. Okhonin, M. Nagoga, P. Fazan, 2003, 2003 IEEE International Conference on SOI.

Capacitor-less 1-transistor DRAM

M. Pastre, M. Kayal, S. Okhonin, 2002, 2002 IEEE International SOI Conference.

80 nm tall thermally stable cost effective FinFETs for advanced dynamic random access memory periphery devices for artificial intelligence/machine learning and automotive applications

Naoto Horiguchi, Alessio Spessot, Eugenio Dentoni Litta, 2021 .

Two-Band Tunneling Currents and Stress-Induced Leakage in Ultra-Thin SiO 2 Films

S. Okhonin, P. Fazan, S. Deleonibus, 1999 .

Origin of the charge to breakdown distributions in thin silicon dioxide films

S. Okhonin, P. Fazan, S. Okhonin, 1998 .

Optimized material solutions for advanced DRAM peripheral transistors

R. Ritzenthaler, T. Schram, N. Horiguchi, 2016 .

Diffusion and Gate Replacement: A New Gate-First High- $k$ /Metal Gate CMOS Integration Scheme Suppressing Gate Height Asymmetry

Naoto Horiguchi, Jerome Mitard, Eddy Simoen, 2016, IEEE Transactions on Electron Devices.

A highly manufacturable trench isolation process for deep submicron DRAMs

P. Fazan, P. C. Fazan, V. K. Mathews, 1993, Proceedings of IEEE International Electron Devices Meeting.

Understanding the EOT-Jg degradation in Ru/SrTiOx/Ru metal-insulator-metal capacitors formed with Ru atomic layer deposition

B. Douhard, M. Jurczak, A. Redolfi, 2015 .