S. Meftali

发表

Automatic generation of embedded memory wrapper for multiprocessor SoC

F. Gharsalli, S. Meftali, F. Rousseau, 2002, Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324).

Targeting Reconﬁgurable FPGA based SoCs using the MARTE UML proﬁle: from high abstraction levels to code generation

S. Meftali, É. Rutten, A. Gamatie, 2017 .

Multi-controller reconfiguration system for FPGAs

S. Meftali, J. Dekeyser, C. Trabelsi, 2011 .

A new multi-objective binary Harris Hawks optimization for gene selection in microarray data

Abdelkamel Tari, Samy Meftali, Ali Dabba, 2021, Journal of Ambient Intelligence and Humanized Computing.

Dataparallelism for Real-Time

Lossan Bonde, Jean-Luc Dekeyser, Abdoulaye Gamatié, 2006 .

Model Driven Architecture for Intensive Embedded Systems

Pierre Boulet, Jean-Luc Dekeyser, Samy Meftali, 2005 .

New Results - Verification, compilation, optimization and simulation issues

Pierre Boulet, Jean-Luc Dekeyser, Abdoulaye Gamatié, 2006 .

Hybridization of Moth flame optimization algorithm and quantum computing for gene selection in microarray data

S. Meftali, A. Tari, Ali Dabba, 2020, Journal of Ambient Intelligence and Humanized Computing.

Gene selection and classification of microarray data method based on mutual information and moth flame algorithm

Samy Meftali, Abdelkamel Tari, Ali Dabba, 2021, Expert Syst. Appl..

Hybridization of Moth flame optimization algorithm and quantum computing for gene selection in microarray data

Samy Meftali, Abdelkamel Tari, Ali Dabba, 2020, Journal of Ambient Intelligence and Humanized Computing.

Model-driven design flow for distributed control in reconfigurable FPGA systems

Jean-Luc Dekeyser, Samy Meftali, Rabie Ben Atitallah, 2014, Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing.

Decentralized control for dynamically reconfigurable FPGA systems

Jean-Luc Dekeyser, Samy Meftali, Chiraz Trabelsi, 2013, Microprocess. Microsystems.

Distributed control for reconfigurable FPGA systems: A high-level design approach

Jean-Luc Dekeyser, Samy Meftali, Chiraz Trabelsi, 2012, 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC).

Expressing embedded systems configurations at high abstraction levels with UML MARTE profile: Advantages, limitations and alternatives

Pierre Boulet, Jean-Luc Dekeyser, Abdoulaye Gamatié, 2012, J. Syst. Archit..

High level design of adaptive distributed controller for partial dynamic reconfiguration in FPGA

Jean-Luc Dekeyser, Samy Meftali, Chiraz Trabelsi, 2011, Proceedings of the 2011 Conference on Design & Architectures for Signal & Image Processing (DASIP).

Designing dynamically reconfigurable SoCs: From UML MARTE models to automatic code generation

Jean-Luc Dekeyser, Samy Meftali, Imran Rafiq Quadri, 2010, 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP).

Targeting reconfigurable FPGA based SoCs using the UML MARTE profile: from high abstraction levels to code generation

Jean-Luc Dekeyser, Éric Rutten, Abdoulaye Gamatié, 2010, Int. J. Embed. Syst..

Design and performance evaluation of a reconfigurable Delta MIN for MPSOC

M. Abid, S. Meftali, J.-L. Dekeyser, 2007, 2007 Internatonal Conference on Microelectronics.

FeRoNoC: Flexible and extensible Router implementation for diagonal mesh topology

Rached Tourki, Jean-Luc Dekeyser, Samy Meftali, 2011, Proceedings of the 2011 Conference on Design & Architectures for Signal & Image Processing (DASIP).

A Model-Driven Approach for Hybrid Power Estimation in Embedded Systems Design

Jean-Luc Dekeyser, Samy Meftali, Rabie Ben Atitallah, 2011, EURASIP J. Embed. Syst..

Vers la reconfiguration dynamique dans les systèmes embarqués: de la modélisation à l'implémentation. (Toward Dynamically Reconfigurable in Embedded Systems: From Models to Implementations)

Samy Meftali, S. Meftali, 2010 .

An MPSoC Performance Estimation Framework Using Transaction Level Modeling

Jean-Luc Dekeyser, Samy Meftali, Rabie Ben Atitallah, 2007, 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2007).

A modeling front-end for seamless design and generation of context-aware Dynamically Reconfigurable Systems-on-Chip

Jean-Philippe Diguet, Samy Meftali, Pamela Wattebled, 2018, J. Parallel Distributed Comput..

System level modeling methodology of NoC design from UML-MARTE to VHDL

S. Meftali, R. Tourki, J. Dekeyser, 2012, Design automation for embedded systems.

System level modeling methodology of NoC design from UML-MARTE to VHDL

Rached Tourki, Pierre Boulet, Jean-Luc Dekeyser, 2012, Des. Autom. Embed. Syst..

Modeling Networks-on-Chip at System Level with the MARTE UML profile

Rached Tourki, Pierre Boulet, Jean-Luc Dekeyser, 2011 .

An MDE approach for modeling network on chip topologies

Majdi elhaji, Pierre boulet, Samy meftali, 2010, 5th International Conference on Design & Technology of Integrated Systems in Nanoscale Era.

A novel grey wolf optimization algorithm based on geometric transformations for gene selection and cancer classification

S. Meftali, A. Tari, Ali Dabba, 2023, J. Supercomput..

A Survey of Keylogger and Screenlogger Attacks in the Banking Sector and Countermeasures to Them

Michael Goldsmith, Samy Meftali, Jassim Happa, 2018, CSS.

Using an MDE Approach for Modeling of Interconnection Networks

Pierre Boulet, Jean-Luc Dekeyser, Samy Meftali, 2008, 2008 International Symposium on Parallel Architectures, Algorithms, and Networks (i-span 2008).

An MDE Approach For Implementing Partial Dynamic Reconfiguration In FPGAs

Jean-Luc Dekeyser, Samy Meftali, S. Meftali, 2007 .

Dynamicity Analysis of Delta MINs for MPSOC Architectures

S. Meftali, M. Abid, J. Dekeyser, 2007 .

Exploration d'architectures et allocation/affectation mémoire dans les systèmes multiprocesseurs mono puce = Architectures exploration and memory allocation/assignment in multiprocessor SoC. (Architectures exploration and memory allocation/assignment in multiprocessor SoC)

Samy Meftali, S. Meftali, 2002 .