F. Hatori

A 2.3 mu m/sup 2/ memory cell structure for 16 Mb NAND EEPROMs

Y. Itoh, M. Momodomi, R. Shirota, 1990, International Technical Digest on Electron Devices.

An H.264/MPEG-4 audio/visual CODEC LSI with module-wise dynamic voltage/frequency scaling

F. Hatori, N. Kawabe, T. Fujiyoshi, 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

Analysis of signal to noise ratio of photoconductive layered solid-state imaging device

F. Hatori, H. Tango, Y. Matsunaga, 1995 .

INVITED PAPER Special Section on VLSI Design Technology in the Sub-100nm Era Module-Wise Dynamic Voltage and Frequency Scaling for a 90nm H.264/MPEG-4 Codec LSI

Mototsugu Hamada, Nonmembers, Yukihito Oowaki, 2006 .

A 60 mW MPEG4 video codec using clustered voltage scaling with variable supply-voltage scheme

H. Momose, Y. Tsuboi, F. Hatori, 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

Introducing redundancy in field programmable gate arrays

Yasuo Kawahara, Takayasu Sakurai, K. Kanzaki, 1993, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.