S. Sweeney

发表

SiGe HBTs for millimeter-wave applications with simultaneously optimized f/sub T/ and f/sub max/ of 300 GHz

T. Adam, S. Jeng, B. Jagannathan, 2004, 2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers.

Effect of substrate contact shape and placement on RF characteristics of 45 nm low power CMOS devices

B. Jagannathan, S. Sweeney, U. Gogineni, 2009, 2009 IEEE Radio Frequency Integrated Circuits Symposium.

A 243-GHz F/sub t/ and 208-GHz F/sub max/, 90-nm SOI CMOS SoC technology with low-power mm-wave digital and RF circuit capability

R. Trzcinski, S. Narasimha, N. Zamdmer, 2005, IEEE Transactions on Electron Devices.

Design Automation Methodology and rf/Analog Modelimg for rf CMOS and . . .

Greg J. Schulberg, D. Sheridan, S. Sweeney, 2003 .

SiGe HBTs for millimeter-wave applications with simultaneously optimized f T and f max of 300 GHz

David R. Greenberg, Basanth Jagannathan, Andreas D. Stricker, 2004, RFIC 2004.

Input non-quasi-static effect in SiGe HBTs and its impact on noise modeling

D. Sheridan, G. Niu, S. Sweeney, 2005, Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting, 2005..

SOI CMOS SoC Technology With Low-Power mmWave Digital and RF Circuit Capability

Jean-Olivier Plouchart, Jonghae Kim, Lawrence F. Wagner, 2005 .

Effect of Substrate Contact Shape and Placement on RF Characteristics of 45 nm Low Power CMOS Devices

Jing Wang, Basanth Jagannathan, Hongmei Li, 2009, IEEE Journal of Solid-State Circuits.

Effect of substrate contact shape and placement on RF characteristics of 45 nm low power CMOS devices

B. Jagannathan, S. Sweeney, U. Gogineni, 2009, 2009 IEEE Radio Frequency Integrated Circuits Symposium.

A cost-competitive high performance Junction-FET (JFET) in CMOS process for RF & analog applications

David Harame, Richard A. Phelps, Yun Shi, 2010, 2010 IEEE Radio Frequency Integrated Circuits Symposium.

Technology Scaling and Device Design for 350 GHz RF Performance in a 45nm Bulk CMOS Process

B. Jagannathan, Jing Wang, Yun Shi, 2007, 2007 IEEE Symposium on VLSI Technology.

Noise performance scaling in high-speed silicon RF technologies

B. Jagannathan, D. Greenberg, D. Ahlgren, 2003, 2003 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, 2003. Digest of Papers..

Comparison of on-wafer multiline TRL and LRM+ calibrations for RF CMOS applications

A. Rumiantsev, S.L. Sweeney, P.L. Corson, 2008, 2008 72nd ARFTG Microwave Measurement Symposium.

Noise performance of a low base resistance 200 GHz SiGe technology

B. Jagannathan, S. Sweeney, D.R. Greenberg, 2002, Digest. International Electron Devices Meeting,.