T. Jang

发表

Vertical double gate Z-RAM technology with remarkable low voltage operation for DRAM application

Sung-Joo Hong, Joong-Sik Kim, Sung-Woong Chung, 2010, 2010 Symposium on VLSI Technology.

STI stress-induced degradation of data retention time in DRAM and a new characterizing method for mechanical stress

S. Cha, Jae-Goan Jeong, Sung-Joo Hong, 2011, 2011 International Reliability Physics Symposium.

Overcoming the reliability limitation in the ultimately scaled DRAM using silicon migration technique by hydrogen annealing

Sungjoo Hong, Seong-Wan Ryu, T. Jang, 2017, 2017 IEEE International Electron Devices Meeting (IEDM).

Highly scalable Z-RAM with remarkably long data retention for DRAM application

Tae-Su Jang, Seung-Chan Moon, Young H. Oh, 2006, 2009 Symposium on VLSI Technology.