C. Stroud

发表

C.E. Stroud, R. R. Munoz, R.R. Munoz, 1988, IEEE Design & Test of Computers.

Minimizing N -detect Tests for Combinational Circuits Minimizing N -detect Tests for Combinational Circuits Minimizing N -detect Tests for Combinational Circuits

Kalyana R. Kantipudi, V. Agrawal, C. Stroud, 2006 .

A built-in self test scheme for VLSI

C. Stroud, M. Chung, T. Raju Damarla, 1995, Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair.

BUILT-IN SELF-TEST FOR A MONOBIT FAST FOURIER TRANSFORM RECEIVER

C. Stroud, 2005 .

Logic Testing

Kwang-Ting Cheng, Charles E. Stroud, Laung-Terng Wang, 2008, Wiley Encyclopedia of Computer Science and Engineering.

Maintenance Registers with Boundary Scan Interface

C. Stroud, R. Karri, Shianling Wu, 2017 .

Design for testability and test generation for static redundancy system level fault-tolerant circuits

Charles E. Stroud, Ahmed E. Barbour, C. Stroud, 1989, Proceedings. 'Meeting the Tests of Time'., International Test Conference.

Multiple error detection and identification via signature analysis

Charles E. Stroud, T. Raju Damarla, Avinash Sathaye, 1995, J. Electron. Test..

FPGA-Based Analog Functional Measurements for Adaptive Control in Mixed-Signal Systems

Foster F. Dai, Charles E. Stroud, Jie Qin, 2007, IEEE Transactions on Industrial Electronics.

Multiple fault simulation with random and clustered fault injection

Charles E. Stroud, C. A. Ryan, C. Stroud, 1995, Proceedings of Eighth International Application Specific Integrated Circuits Conference.

Selective Spectrum Analysis for Analog Measurements

Foster F. Dai, Charles E. Stroud, Jie Qin, 2011, IEEE Transactions on Industrial Electronics.

Noise Figure Measurement Using Mixed-Signal BIST

Foster F. Dai, Charles E. Stroud, Jie Qin, 2007, 2007 IEEE International Symposium on Circuits and Systems.

System-on-Chip Test Architectures

Nur A. Touba, Charles E. Stroud, Laung-Terng Wang, 2008 .

Trends in digital device test methodologies

Shianling Wu, F. Edward Crane, Jack Kane, 1994, AT&T Technical Journal.

Testability and test generation for majority voting fault-tolerant circuits

Charles E. Stroud, Ahmed E. Barbour, C. Stroud, 1993, J. Electron. Test..

BIST-based test and diagnosis of FPGA logic blocks

Charles E. Stroud, Miron Abramovici, C. Stroud, 2001, IEEE Trans. Very Large Scale Integr. Syst..

System-on-Chip Test Architectures: Nanometer Design for Testability

Wang, C. Stroud, N. Touba, 2007 .

Applying built-in self-test to majority voting fault tolerant circuits

Charles E. Stroud, Joe K. Tannehill, C. Stroud, 1998, Proceedings. 16th IEEE VLSI Test Symposium (Cat. No.98TB100231).

Built-in self-test for high-speed data-path circuitry

Charles E. Stroud, C. Stroud, 1991, 1991, Proceedings. International Test Conference.

Automated BIST for sequential logic synthesis

C.E. Stroud, C. Stroud, 1988, IEEE Design & Test of Computers.

An automated BIST approach for general sequential logic synthesis

Charles E. Stroud, C. Stroud, 1988, 25th ACM/IEEE, Design Automation Conference.Proceedings 1988..

Fundamentals of VLSI Testing

Charles E. Stroud, Laung-Terng Wang, C. Stroud, 2010 .

Modeling, design, and performance analysis of a parallel hybrid data/command driven architecture system and its scalable dynamic load balancing circuit

Charles E. Stroud, J. R. Heath, S. Ramamoorthy, 1997 .

Online Fault Tolerance for FPGA Logic Blocks

Charles E. Stroud, Miron Abramovici, John M. Emmert, 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

An Automated BIST Architecture for Testing and Diagnosing FPGA Interconnect Faults

Tian Xia, Charles E. Stroud, Jack R. Smith, 2006, J. Electron. Test..

BIST-Based Delay-Fault Testing in FPGAs

Charles E. Stroud, Miron Abramovici, C. Stroud, 2002, Proceedings of the Eighth IEEE International On-Line Testing Workshop (IOLTW 2002).

Roving STARs: an integrated approach to on-line testing, diagnosis, and fault tolerance for FPGAs in adaptive computing systems

Charles E. Stroud, Miron Abramovici, John M. Emmert, 2001, Proceedings Third NASA/DoD Workshop on Evolvable Hardware. EH-2001.

Built-In Self-Test of Logic Blocks in FPGAs

Charles E. Stroud, Ping Chen, Miron Abramovici, 2000 .