Paul D. Franzon

发表

Hardware-efficient pattern matching algorithms and architectures for fast intrusion detection

Paul D. Franzon, Monther Aldwairi, 2006 .

A compact inductively coupled connector for mobile devices

Paul D. Franzon, Wenxu Zhao, Peter Gadfort, 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.

Paul D. Franzon, 2019 .

A Generally Applicable Calibration Algorithm for Digitally Reconfigurable Self-Healing RFICs

Paul D. Franzon, Eric J. Wyers, Matthew A. Morton, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Molecular Electronics - Devices and Circuits Technology

Paul D. Franzon, David Nackashi, Christian Amsinck, 2005, VLSI-SoC.

Parasitic extraction accuracy; how much is enough? (panel)

Paul D. Franzon, Sharad Mehrotra, Mark Basel, 1999, DAC '99.

Tools to aid in wiring rule generation for high speed interconnects

Paul D. Franzon, Sharad Mehrotra, Michael B. Steer, 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.

Leveraging high density packaging for high performance DSP systems

Paul D. Franzon, Thomas M. Conte, P. Mehrotra, 2000, IEEE 9th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.00TH8524).

Nanocell logic gates for molecular computing

Paul D. Franzon, James M. Tour, W. L. Van Zandt, 2002 .

The performance and experimental results of a multiple bit rate symbol timing recovery circuit for PSK receivers

Paul D. Franzon, Mehmet R. Yuce, Wentai Liu, 2004, Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571).

A Generic and Scalable Architecture for a Large Acoustic Model and Large Vocabulary Speech Recognition Accelerator Using Logic on Memory

Paul D. Franzon, Ojas A. Bapat, Richard M. Fastow, 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Translating the Integration Challenges to Molecular Device Requirements - Analysis of Scaling Constraints in Molecular Random Access Memories

Paul D. Franzon, David P. Nackashi, C. J. Amsinck, 2004 .

RF-Only Logic: an Area Efficient Logic Family for RF-Power Harvesting Applications

Paul D. Franzon, Wenxu Zhao, Peter Gadfort, 2018, IEEE Transactions on Circuits and Systems I: Regular Papers.

Multimode High-Density Link Design Methodology and Implementation

Paul D. Franzon, Henning Braunisch, Zhuo Yan, 2016, IEEE Transactions on Components, Packaging and Manufacturing Technology.

Overview of RFID technology and its applications in the food industry.

Paul D. Franzon, P. Kumar, H. W. Reinitz, 2009, Journal of food science.

An enhanced macromodeling approach for differential output drivers

Ting Zhu, Paul D. Franzon, 2009, 2009 IEEE Behavioral Modeling and Simulation Workshop.

Dynamic electrothermal simulation of three-dimensional integrated circuits using standard cell macromodels

Paul D. Franzon, Michael B. Steer, William Rhett Davis, 2012, IET Circuits Devices Syst..

Creating 3D specific systems: architecture, design and CAD

Paul D. Franzon, W. Rhett Davis, Thor Thorolffson, 2010, DATE 2010.

Chip-package codesign-challenges and directions

Paul D. Franzon, P. Franzon, 1999, Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198).

A 32Gb/s On-chip Bus with Driver Pre-emphasis Signaling

Jian Xu, Paul D. Franzon, Lei Luo, 2006, IEEE Custom Integrated Circuits Conference 2006.

Computer design strategy for MCM-D/flip-chip technology

Tayana Conte, Paul D. Franzon, Axel Glaser, 1996 .

Exploring early design tradeoffs in 3DIC

Paul D. Franzon, William Rhett Davis, Shivam Priyadarshi, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

Leveraging 3D-IC for on-chip timing uncertainty measurements

Paul D. Franzon, Wenxu Zhao, William Rhett Davis, 2014, 2014 International 3D Systems Integration Conference (3DIC).

MEMS-based capacitor arrays for programmable interconnect and RF applications

Paul D. Franzon, John M. Wilson, B. E. Duewer, 1999, Proceedings 20th Anniversary Conference on Advanced Research in VLSI.

Design strategies for processor, chip/package co-design (M-VI)

En-Xiao Liu, Paul D. Franzon, 2011 .

SABSA: SWITCHING-ACTIVITY-BASED STATE ASSIGNMENT

Paul D. Franzon, Scott Washabaugh, H. Troy Nagle, 1994 .

Model-Based Variation-Aware Integrated Circuit Design

Michael B. Steer, Paul D. Franzon, Mustafa Berke Yelten, 2013 .

MCM Package Selection: A Systems Need Perspective

Paul D. Franzon, 1993 .

Junction-Level Thermal Analysis of 3-D Integrated Circuits Using High Definition Power Blurring

Paul D. Franzon, Michael B. Steer, William Rhett Davis, 2012, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

RFIC IP Redesign and Reuse Through Surrogate Based Machine Learning Method

Paul D. Franzon, Yi Wang, 2018, 2018 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization (NEMO).

Hardware Architecture of a Parallel Pattern Matching Engine

Paul D. Franzon, Meeta Yadav, Ashwini Venkatachaliah, 2007, 2007 IEEE International Symposium on Circuits and Systems.

Thermal Pathfinding for 3-D ICs

Paul D. Franzon, Michael B. Steer, Shivam Priyadarshi, 2014, IEEE Transactions on Components, Packaging and Manufacturing Technology.

An efficient table-driven decoder for one-half rate convolutional codes

Mladen A. Vouk, Paul D. Franzon, L. Wang, 1992, ACM Southeast Regional Conference.

Analysis and approach of TSV-based hierarchical power distribution networks for estimating 1st-Droop and resonant noise in 3DIC

Paul D. Franzon, Jaemin Kim, Gary Charles, 2011, 2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems.

3-D-DATE: A Circuit-Level Three-Dimensional DRAM Area, Timing, and Energy Model

Paul D. Franzon, Jong Beom Park, William Rhett Davis, 2019, IEEE Transactions on Circuits and Systems I: Regular Papers.

Design of a rectifier-free UHF Gen-2 compatible RFID Tag using RF-only logic

Paul D. Franzon, Wenxu Zhao, Kirti Bhanushali, 2016, 2016 IEEE International Conference on RFID (RFID).

Verilog Styles for Synthesis of Digital Systems

Paul D. Franzon, David Richard Smith, 2019 .

Low power interconnect design for fpgas with bidirectional wiring using nanocrystal floating gate devices (abstract only)

Paul D. Franzon, Neil Di Spigna, Daniel Schinke, 2011, FPGA '11.

Thermal requirements in future 3D processors

Paul D. Franzon, Avi Bar-Cohen, 2013, 2013 IEEE International 3D Systems Integration Conference (3DIC).

Flexible Low Power Probability Density Estimation Unit For Speech Recognition

Paul D. Franzon, Ullas Pazhayaveetil, Dhruba Chandra, 2007, 2007 IEEE International Symposium on Circuits and Systems.

Electrical Design of Digital Multichip Modules

Paul D. Franzon, 1993 .

Modelling interconnect yield in reconfigurable circuits

Paul D. Franzon, 1989 .

Process mismatch analysis based on reduced-order models

Paul D. Franzon, Michael B. Steer, Mustafa Berke Yelten, 2012, Thirteenth International Symposium on Quality Electronic Design (ISQED).

Network processor design for optical burst switched networks

Paul D. Franzon, Ilia Baldine, P. Mehrotra, 2001, Proceedings 14th Annual IEEE International ASIC/SOC Conference (IEEE Cat. No.01TH8558).

MOOCs, OOCs, flips and hybrids: The new world of higher education

Paul D. Franzon, 2013, 2013 IEEE International Conference on Microelectronic Systems Education (MSE).

Application of Surrogate Modeling in Variation-aware Macromodel and Circuit Design

Ting Zhu, Paul D. Franzon, Michael B. Steer, 2011, SIMULTECH.

Hardware implementation of a low power speech recognition system

Paul D. Franzon, Ullas Chandrasekhar Pazhayaveetil, 2007 .

H3 (Heterogeneity in 3D): A Logic-on-Logic 3D-Stacked Heterogeneous Multi-Core Processor

Eric Rotenberg, Paul D. Franzon, William Rhett Davis, 2017, 2017 IEEE International Conference on Computer Design (ICCD).

Low-Power Hypercube Divided Memory FFT Engine Using 3D Integration

Paul D. Franzon, William Rhett Davis, Samson Melamed, 2010, TODE.

Configurable string matching hardware for speeding up intrusion detection

Paul D. Franzon, Monther Aldwairi, Thomas M. Conte, 2005, CARN.

Multichip Module Technology

Paul D. Franzon, 2005 .

An accurate, computationally efficient crosstalk model for routing high-speed MCMs

Paul D. Franzon, K. J. McClellan, T. S. Wailes, 1997, Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334).

Design for 3D Integration at North Carolina State University

Paul D. Franzon, 2008 .

CAD tools for managing signal integrity and congestion simultaneously

Paul D. Franzon, Michael B. Steer, Griff L. Bilbro, 1994, Proceedings of 1994 IEEE Electrical Performance of Electronic Packaging.

Characterization of the mechanical stress impact on device electrical performance in the CMOS and III–V HEMT/HBT heterogeneous integration environment

Paul D. Franzon, Jordan E. Massad, Eric J. Wyers, 2015, 2015 International 3D Systems Integration Conference (3DIC).

Computing with Novel Floating-Gate Devices

Paul D. Franzon, Neil Di Spigna, Daniel Schinke, 2011, Computer.

Under 100-cycle thread migration latency in a single-ISA heterogeneous multi-core processor

Eric Rotenberg, Paul D. Franzon, Brandon H. Dwiel, 2015, 2015 IEEE Hot Chips 27 Symposium (HCS).

Multi-bit fractional equalization for multi-Gb/s inductively coupled connectors

Paul D. Franzon, Evan Erickson, John Wilson, 2009, 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems.

Appliance Identification Algorithm for a Non-Intrusive Home Energy Monitor Using Cogent Confabulation

Paul D. Franzon, Sung Wook Park, Lee B. Baker, 2019, IEEE Transactions on Smart Grid.

Design Considerations and Benefits of Three-Dimensional Ternary Content Addressable Memory

Paul D. Franzon, Eun Chu Oh, P. Franzon, 2007, 2007 IEEE Custom Integrated Circuits Conference.

Logic-on-logic 3D integration and placement

Jason Cong, Paul D. Franzon, Guojie Luo, 2010, 2010 IEEE International 3D Systems Integration Conference (3DIC).

The design, fabrication, and characterization of millimeter scale motors for miniature direct drive robots

Paul D. Franzon, Edward Grant, A. I. Kingon, 2004, IEEE International Conference on Robotics and Automation, 2004. Proceedings. ICRA '04. 2004.

Millimeter-Scale True 3-D Antenna-in-Package Structures for Near-Field Power Transfer

Paul D. Franzon, Peter Gadfort, 2014, IEEE Transactions on Components, Packaging and Manufacturing Technology.

Impact of an SoC research project on microelectronics education: a case study

Paul D. Franzon, Numan Sadi Dogan, Wentai Liu, 2005, 2005 IEEE International Conference on Microelectronic Systems Education (MSE'05).

Low-power self-equalizing driver for silicon carrier interconnects with low bit error rate

Paul D. Franzon, Peter Gadfort, P. Franzon, 2009, 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems.

Multichip Module Technologies and Alternatives: The Basics

Paul D. Franzon, Daryl Ann Doane, P. Franzon, 1992, Springer US.

Low power data processing by elimination of redundant computations

Paul D. Franzon, Wentai Liu, Mir Azam, 1997, Proceedings of 1997 International Symposium on Low Power Electronics and Design.

Physical design of a 3D-stacked heterogeneous multi-core processor

Eric Rotenberg, Paul D. Franzon, William Rhett Davis, 2016, 2016 IEEE International 3D Systems Integration Conference (3DIC).

Dynamically Programmable Cache Evaluation and Virtualization

Paul D. Franzon, Thomas M. Conte, John A. Harding, 1999 .

Thermal simulation of heterogeneous GaN/ InP/silicon 3DIC stacks

Paul D. Franzon, Lee Wang, Eric J. Wyers, 2015, 2015 International 3D Systems Integration Conference (3DIC).

Design of 60 GHz contactless probe system for RDL in passive silicon interposer

Paul D. Franzon, Edward J. Suh, 2013, 2013 IEEE International 3D Systems Integration Conference (3DIC).

Editorial: Special issue on 3D integrated circuits and microarchitectures

Jason Cong, Yuan Xie, Paul D. Franzon, 2008, JETC.

A novel double floating-gate unified memory device

Paul D. Franzon, Neil Di Spigna, Veena Misra, 2012, 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC).

Circuit/channel co-design methodology for multimode signaling

Paul D. Franzon, Henning Braunisch, Zhuo Yan, 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.

3D-enabled customizable embedded computer (3DECC)

Eric Rotenberg, Chao Li, Paul D. Franzon, 2014, 2014 International 3D Systems Integration Conference (3DIC).

Skew and delay minimization of high speed CMOS circuits using stochastic optimization

Paul D. Franzon, Wentai Liu, S. Mehrotra, 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.

Crosstalk-Canceling Multimode Interconnect Using Transmitter Encoding

Paul D. Franzon, HoonSeok Kim, Chanyoun Won, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Accurate and Scalable IO Buffer Macromodel Based on Surrogate Modeling

Paul D. Franzon, Michael B. Steer, Ting Zhu, 2011, IEEE Transactions on Components, Packaging and Manufacturing Technology.

Pathfinder 3D: A flow for system-level design space exploration

Xi Chen, Paul D. Franzon, William Rhett Davis, 2012, 2011 IEEE International 3D Systems Integration Conference (3DIC), 2011 IEEE International.

Molecular electronics: from devices and interconnect to circuits and architecture

Seth Copen Goldstein, Mircea R. Stan, Matthew M. Ziegler, 2003, Proc. IEEE.

FreePDK: An Open-Source Variation-Aware Design Kit

Paul D. Franzon, Michael Bucher, Fred Love, 2007, 2007 IEEE International Conference on Microelectronic Systems Education (MSE'07).

System design optimization for MCM-D/flip-chip

Paul D. Franzon, A. Stanaski, Y. Tekmen, 1995 .

Computer design strategy for MCM-D/flip-chip technology

Paul D. Franzon, Thomas M. Conte, Steve Lipa, 1996, Proceedings Ninth Annual IEEE International ASIC Conference and Exhibit.

Applications and design styles for 3DIC

Eric Rotenberg, Paul D. Franzon, Huiyang Zhou, 2013, 2013 IEEE International Electron Devices Meeting.

An Application Specific Processor Architecture with 3D Integration for Recurrent Neural Networks

Paul D. Franzon, Sumon Dey, P. Franzon, 2019, 20th International Symposium on Quality Electronic Design (ISQED).

Self-calibrating clock distribution with scheduled skews

Paul D. Franzon, Wentai Liu, Hong-Yean Hsieh, 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

3D Specific Systems: Design and CAD

Paul D. Franzon, William Rhett Davis, Samson Melamed, 2011, Asian Test Symposium.

Applications of machine learning in EDA (Conference Presentation)

Paul D. Franzon, 2019 .

Issues in partitioning integrated circuits for MCM-D/flip-chip technology

Paul D. Franzon, Steve Lipa, A. Glaser, 1996, Proceedings 1996 IEEE Multi-Chip Module Conference (Cat. No.96CH35893).

Pin assignment for high-performance MCM systems

Paul D. Franzon, Griff L. Bilbro, Y. Tekmen, 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

Delay and reflection noise macromodeling for signal integrity management of PCBs and MCMs

Paul D. Franzon, Sharad Mehrotra, Michael B. Steer, 1994 .

Stochastic Optimization Approach to Transistor Sizing for CMOS VLSI Circuits

Paul D. Franzon, Sharad Mehrotra, Wentai Liu, 1994, 31st Design Automation Conference.

3D Specific Systems: Design and CAD

Paul D. Franzon, William Rhett Davis, Samson Melamed, 2011, 2011 Asian Test Symposium.

RDL and interposer design for DiRAM4 interfaces

Paul D. Franzon, Theodros Nigussie, 2016, 2016 IEEE 25th Conference on Electrical Performance Of Electronic Packaging And Systems (EPEPS).

Application Exploration for 3-D Integrated Circuits: TCAM, FIFO, and FFT Case Studies

Paul D. Franzon, William Rhett Davis, Eun Chu Oh, 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Design and ASIC acceleration of cortical algorithm for text recognition

Paul D. Franzon, Sumon Dey, 2016, 2016 29th IEEE International System-on-Chip Conference (SOCC).

Future Physical Environments and Concurrent Computation

Paul D. Franzon, L. A. Hornak, Stuart K. Tewksbury, 1988 .

Modeling and compare of through-silicon-via (TSV) in high frequency

Paul D. Franzon, Ran Wang, Gary Charles, 2012, 2011 IEEE International 3D Systems Integration Conference (3DIC), 2011 IEEE International.

Junction-level thermal extraction and simulation of 3DICs

Paul D. Franzon, William Rhett Davis, Samson Melamed, 2009, 2009 IEEE International Conference on 3D System Integration.

Demystifying 3D ICs: the pros and cons of going vertical

Jian Xu, Paul D. Franzon, Michael B. Steer, 2005, IEEE Design & Test of Computers.

Architecture for Low Power Large Vocabulary Speech Recognition

Paul D. Franzon, Ullas Pazhayaveetil, Dhruba Chandra, 2006, 2006 IEEE International SOC Conference.

A Bounded and Discretized Nelder-Mead Algorithm Suitable for RFIC Calibration

Paul D. Franzon, Eric J. Wyers, C. T. Kelley, 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

Comparison of Reconfiguration Schemes for Defect Tolerant Mesh Arrays

Paul D. Franzon, 1990 .

2Deep: Enhancing Side-Channel Attacks on Lattice-Based Key-Exchange via 2-D Deep Learning

Paul D. Franzon, Aydin Aysu, Seetal Potluri, 2021, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Will Nanotechnology Change the Way We Design and Verify Systems? (Panel).

Seth Copen Goldstein, Paul D. Franzon, Robert W. Dutton, 2001, ICCAD 2001.

Processor-in-memory support for artificial neural networks

Paul D. Franzon, Weifu Li, Joshua Schabel, 2016, 2016 IEEE International Conference on Rebooting Computing (ICRC).

Foreword Special Section on Electrical Performance Analysis and Simulation of Interconnects, Packages and Devices Composing Electronic Systems for High-Performance Applications

Flavio Canavero, Paul D. Franzon, 2008 .

Pathfinder3D: A framework for exploring early thermal tradeoffs in 3DIC

Paul D. Franzon, William Rhett Davis, Shivam Priyadarshi, 2014, 2014 IEEE International Conference on IC Design & Technology.

A 10.35 mW/GFlop stacked SAR DSP unit using fine-grain partitioned 3D integration

Paul D. Franzon, Thorlindur Thorolfsson, Steve Lipa, 2012, Proceedings of the IEEE 2012 Custom Integrated Circuits Conference.

Rationale for a 3D heterogeneous multi-core processor

Eric Rotenberg, Paul D. Franzon, Brandon H. Dwiel, 2013, 2013 IEEE 31st International Conference on Computer Design (ICCD).

Self-Evolution Cascade Deep Learning Model for High-Speed Receiver Adaptation

Paul D. Franzon, Bowen Li, Chih-Hsun Chou, 2020, IEEE Transactions on Components, Packaging and Manufacturing Technology.

Power comparison of 2D, 3D and 2.5D interconnect solutions and power optimization of interposer interconnects

Paul D. Franzon, Anil Kumar, M. Ataul Karim, 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.

Hardware Acceleration of Sparse Cognitive Algorithms

Paul D. Franzon, Weifu Li, Joshua Schabel, 2016 .

High Performance Design Automation for Multi-Chip Modules

Paul D. Franzon, J. D. Cho, P. Franzon, 1996 .

A multichip module design process for notebook computers

Paul D. Franzon, Robert J. Evans, 1993, Computer.

Infrastructure and course progression for complex IC design education

Paul D. Franzon, A. Glaser, C. Gloster, 1999, Proceedings 1999 IEEE International Conference on Microelectronic Systems Education (MSE'99) 'Systems Education in the 21st Century' (Cat. No.99-63794).

TSV-based, modular and collision detectable face-to-back shared bus design

Paul D. Franzon, Zhenqian Zhang, 2013, 2013 IEEE International 3D Systems Integration Conference (3DIC).

Automatic a-priori generation of delay and noise macromodels and wiring rules for MCMs

Paul D. Franzon, Michael B. Steer, S. Mehrotra, 1993, Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93.

Voltage-Mode Driver Preemphasis Technique For On-Chip Global Buses

Jian Xu, Paul D. Franzon, Lei Luo, 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Comparing Through-Silicon-Via (TSV) Void/Pinhole Defect Self-Test Methods

Fan Zhang, Paul D. Franzon, Yi Lou, 2012, J. Electron. Test..

Hetero2 3D integration: A scheme for optimizing efficiency/cost of Chip Multiprocessors

Eric Rotenberg, Paul D. Franzon, Niket Kumar Choudhary, 2013, International Symposium on Quality Electronic Design (ISQED).

TCAM core design in 3D IC for low matchline capacitance and low power

Paul D. Franzon, Eun Chu Oh, 2007, SPIE Micro + Nano Materials, Devices, and Applications.

A low power 3D integrated FFT engine using hypercube memory division

Paul D. Franzon, Nariman Moezzi Madani, Thorlindur Thorolfsson, 2009, ISLPED.

Comparative analysis of two 3D integration implementations of a SAR processor

Paul D. Franzon, Samson Melamed, Thorlindur Thorolfsson, 2009, 2009 IEEE International Conference on 3D System Integration.

Energy control and accurate delay estimation in the design of CMOS buffers

Paul D. Franzon, Sha Ma, 1994 .

Macromodels for generating signal integrity and timing management advice for package design

Paul D. Franzon, Michael B. Steer, S. Mehrotra, 1993, Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93).

Through Silicon Via(TSV) defect/pinhole self test circuit for 3D-IC

Paul D. Franzon, Alexander Leonard, Menglin Tsai, 2009, 2009 IEEE International Conference on 3D System Integration.

A surrogate model-based framework for design and macromodeling of self-calibrated analog circuits

Paul D. Franzon, Ting Zhu, 2012 .

Memory rich applications for 3D integration

Paul D. Franzon, Rhett Davis, Julie Oh, 2008, Micro + Nano Materials, Devices, and Applications.

Computing in 3D

Eric Rotenberg, Paul D. Franzon, Huiyang Zhou, 2015, CICC.

Computing in 3D

Eric Rotenberg, Paul D. Franzon, Huiyang Zhou, 2015, 2015 International 3D Systems Integration Conference (3DIC).

Face-to-face bus design with built-in self-test in 3D ICs

Krishnendu Chakrabarty, Paul D. Franzon, Brandon Noia, 2013, 2013 IEEE International 3D Systems Integration Conference (3DIC).

A signal integrity advisor for automated packaging design

Michael B. Steer, Paul D. Franzon, S. Mehrotra, 1993, Proceedings of IEEE Electrical Performance of Electronic Packaging.

Simulation and Experimental Characterization of a Unified Memory Device with Two Floating-Gates

Paul D. Franzon, Neil Di Spigna, Veena Misra, 2012, VLSI-SoC.

Speech recognition co-processor

Paul D. Franzon, Dhruba Chandra, 2007 .

Adaptive and Reliable Clock Distribution Design for 3-D Integrated Circuits

Paul D. Franzon, William Rhett Davis, Ting Zhu, 2014, IEEE Transactions on Components, Packaging and Manufacturing Technology.

Machine learning in physical design

Paul D. Franzon, Bowen Li, P. Franzon, 2016, 2016 IEEE 25th Conference on Electrical Performance Of Electronic Packaging And Systems (EPEPS).

Scalable VLSI implementations for neural networks

Wesley E. Snyder, Paul D. Franzon, Thomas K. Miller, 1990, J. VLSI Signal Process..

A simple method for noise tolerance characterization of digital circuits

Paul D. Franzon, Michael B. Steer, Slobodan Simovich, 1993, [1993] Proceedings Third Great Lakes Symposium on VLSI-Design Automation of High Performance VLSI Systems.

The NCSU Cadence Design Kit for IC Fabrication through MOSIS

Paul D. Franzon, Toby Schaffer, Andy Stanaski, 1999, MSE.

Design and Computer Aided Design of 3DIC

Paul D. Franzon, William Rhett Davis, Thorlindur Thorolfsson, 2011, 3D Integration for NoC-based SoC Architectures.

SOI CMOS Implementation of a Multirate PSK Demodulator for Space Communications

Paul D. Franzon, Mehmet R. Yuce, Numan Sadi Dogan, 2007, IEEE Transactions on Circuits and Systems I: Regular Papers.

Dynamically programmable cache

Paul D. Franzon, Thomas M. Conte, John A. Harding, 1998, Other Conferences.

Parallel Transient Simulation of Multiphysics Circuits Using Delay-Based Partitioning

Paul D. Franzon, Christopher S. Saunders, Michael B. Steer, 2012, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

The NCSU Tezzaron design kit

Paul D. Franzon, Thorlindur Thorolfsson, Steve Lipa, 2010, 2010 IEEE International 3D Systems Integration Conference (3DIC).

Estimating Pareto Optimum Fronts to Determine Knob Settings in Electronic Design Automation Tools

Paul D. Franzon, William Rhett Davis, W. R. Davis, 2019, 20th International Symposium on Quality Electronic Design (ISQED).

Energy consumption modeling and optimization for SRAM's

Paul D. Franzon, R. J. Evans, P. Franzon, 1995, IEEE J. Solid State Circuits.

Reconfigurable five-layer three-dimensional integrated memory-on-logic synthetic aperture radar processor

Paul D. Franzon, Nariman Moezzi Madani, Thorlindur Thorolfsson, 2011, IET Comput. Digit. Tech..

Methodology, Tools and Demonstration of MCM System Optimization

Paul D. Franzon, 1997 .

A zero power consumption Multi-Capacitor structure for voltage summing in high-speed FFE

Paul D. Franzon, W. Shepherd Pitts, Bruce Su, 2010, 19th Topical Meeting on Electrical Performance of Electronic Packaging and Systems.

Creating 3D specific systems: Architecture, design and CAD

Paul D. Franzon, William Rhett Davis, Thorlindur Thorolfsson, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

High speed bus design using HSPICE optimization techniques based on the worst case design approach

Michael B. Steer, Paul D. Franzon, R. Lakhani, 1996 .

Controlled nanowire fabrication by PEDAL process

Paul D. Franzon, Sachin Sonkusale, P. Franzon, 2006, 2006 1st International Conference on Nano-Networks and Workshops.

System-level specification of instruction sets

Paul D. Franzon, Thomas K. Miller, Edwin A. Harcourt, 1993, Proceedings of 1993 IEEE International Conference on Computer Design ICCD'93.

Electronic Design Automation for 3D

Paul D. Franzon, 2019 .

Storage Class Memory

Paul D. Franzon, Geoffrey W. Burr, 2014 .

A robust calibration and supervised machine learning reliability framework for digitally-assisted self-healing RFICs

Paul D. Franzon, Eric J. Wyers, Weiyi Qi, 2017, 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS).

SPICE-compatible physical model of nanocrystal floating gate devices for circuit simulation

Paul D. Franzon, Neil Di Spigna, Shivam Priyadarshi, 2011, IET Circuits Devices Syst..

Thermal effects of heterogeneous interconnects on InP / GaN / Si diverse integrated circuits

Paul D. Franzon, T. Robert Harris, W. Rhett Davis, 2014, 2014 International 3D Systems Integration Conference (3DIC).

Tools for Chip-Package Co-Design

Paul D. Franzon, Madhavan Swaminathan, 2016 .

Design automation for a 3DIC FFT processor for synthetic aperture radar: A case study

Paul D. Franzon, Thorlindur Thorolfsson, Kiran Gonsalves, 2009, 2009 46th ACM/IEEE Design Automation Conference.

Hardware implementation of Hierarchical Temporal Memory algorithm

Paul D. Franzon, Weifu Li, 2016, 2016 29th IEEE International System-on-Chip Conference (SOCC).

Exploring the Tradeoffs of Application-Specific Processing

Paul D. Franzon, Joshua C. Schabel, 2018, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

Driver pre-emphasis techniques for on-chip global buses

Jian Xu, Paul D. Franzon, Lei Luo, 2005, ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005..

Novel hardware architecture for fast address lookups

Paul D. Franzon, P. Mehrotra, 2002 .

Technology impact analysis for 3D TCAM

Paul D. Franzon, Eun Chu Oh, 2009, 2009 IEEE International Conference on 3D System Integration.

Variation-Aware Circuit Macromodeling and Design Based on Surrogate Models

Ting Zhu, Paul D. Franzon, Michael B. Steer, 2011, SIMULTECH.

A Layout-Driven Yield Predictor and Fault Generator

Paul D. Franzon, A. R. Dalal, M. J. Lorenzetti, 1993 .

Keeping hot chips cool: Are IC thermal problems hot air?

Alan J. Weger, Paul D. Franzon, Stephen V. Kosonocky, 2008, 2008 45th ACM/IEEE Design Automation Conference.

DATA COMPRESSION AND NETWORK PROCESSING FOR POLYMORPHOUS COMPUTING ARCHITECTURE (PCA)

Paul D. Franzon, Monther Aldwairi, Thomas M. Conte, 2005 .

High speed digital system simulation using frequency dependent transmission line network modeling

Michael B. Steer, Paul D. Franzon, Mark Basel, 1991, 1991 IEEE MTT-S International Microwave Symposium Digest.

A 36Gb/s ACCI Multi-Channel Bus using a Fully Differential Pulse Receiver

Jian Xu, Paul D. Franzon, Evan Erickson, 2006, IEEE Custom Integrated Circuits Conference 2006.

System design optimization for MCM

Paul D. Franzon, A. Stanaski, Y. Tekmen, 1995, Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95).

Performance Driven Global Routing and Wiring Rule Generation for High Speed PCBs and MCMs

Paul D. Franzon, Sharad Mehrotra, Michael B. Steer, 1995, 32nd Design Automation Conference.

Design of controller for L2 cache mapped in Tezzaron stacked DRAM

Eric Rotenberg, Paul D. Franzon, William Rhett Davis, 2013, 2013 IEEE International 3D Systems Integration Conference (3DIC).

Clocking Optimization and Distribution in Digital Systems with Scheduled Skews

Paul D. Franzon, Wentai Liu, Ralph K. Cavin, 1997, J. VLSI Signal Process..

Thermal isolation in 3D chip stacks using vacuum gaps and capacitive or inductive communications

Ming Li, Paul D. Franzon, John M. Wilson, 2010, 2010 IEEE International 3D Systems Integration Conference (3DIC).

Simplified delay design guidelines for on-chip global interconnects

Paul D. Franzon, Liang Zhang, Wentai Liu, 2004, GLSVLSI '04.

Binary search schemes for fast IP lookups

Paul D. Franzon, Pronita Mehrotra, 2002, Global Telecommunications Conference, 2002. GLOBECOM '02. IEEE.

Panel: will nanotechnology change the way we design and verify systems?

Seth Copen Goldstein, Robert W. Dutton, Paul D. Franzon, 2001, ICCAD.

Coordinating 3D designs: Interface IP, standards or free form?

Paul D. Franzon, Zheng Zhou, Tanay Karnik, 2012, 2011 IEEE International 3D Systems Integration Conference (3DIC), 2011 IEEE International.

Design and CAD for 3D integrated circuits

Paul D. Franzon, Michael B. Steer, William Rhett Davis, 2008, 2008 45th ACM/IEEE Design Automation Conference.

Hardware Implementation of Hierarchical Temporal Memory Algorithm

Paul D. Franzon, Joshua Schabel, Weifu Li, 2022, ACM J. Emerg. Technol. Comput. Syst..

Fast and Accurate PPA Modeling with Transfer Learning

Paul D. Franzon, William Rhett Davis, Luis Francisco, 2021, 2021 ACM/IEEE 3rd Workshop on Machine Learning for CAD (MLCAD).

A Scalable Cluster-based Hierarchical Hardware Accelerator for a Cortically Inspired Algorithm

Paul D. Franzon, Weifu Li, Joshua Schabel, 2021, ACM J. Emerg. Technol. Comput. Syst..

Fast and Accurate PPA Modeling with Transfer Learning

Paul D. Franzon, William Rhett Davis, Luis Francisco, 2021, 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD).

Physically based molecular device model in a transient circuit simulator

Michael B. Steer, Paul D. Franzon, Gemma C. Solomon, 2006 .

Handbook of 3D Integration

Erik Jan Marinissen, Paul D. Franzon, Muhannad S. Bakir, 2019 .

Performance evaluation of micromechanical binary phase-only holographic optical elements

Paul D. Franzon, Bruce E. Duewer, David A. Winick, 1997, 1997 Proceedings 47th Electronic Components and Technology Conference.

Electrical Characterization of Transmission Lines on Nonwoven Textile Substrates

Paul D. Franzon, H. Troy Nagle, Edward Grant, 2005 .

A compact dielectric elastomer tubular actuator for refreshable Braille displays

Paul D. Franzon, Tushar K. Ghosh, N. Di Spigna, 2012 .

A micro-machined approach to optical interconnect

Paul D. Franzon, David A. Winick, W. M. Teague, 1995, 1995 Proceedings. 45th Electronic Components and Technology Conference.

A 0.65 mW/Gbps 30 Gbps capacitive coupled 10 mm serial link in 2.5D silicon interposer

Paul D. Franzon, M. Ataul Karim, 2014, 2014 IEEE 23rd Conference on Electrical Performance of Electronic Packaging and Systems.

Flip-chip power distribution

Paul D. Franzon, Steve Lipa, J. T. Schaffer, 1998, IEEE 7th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.98TH8370).

High displacement piezoelectric actuators: characterization at high load with controlled end conditions

Paul D. Franzon, Edward Grant, Timothy D. Usher, 2000, ISAF 2000. Proceedings of the 2000 12th IEEE International Symposium on Applications of Ferroelectrics (IEEE Cat. No.00CH37076).

International Roadmap of Devices and Systems 2017 Edition: Beyond CMOS chapter.

Paul D. Franzon, Paul D. Franzon, Geoffrey W. Burr, 2018 .

Experimental characterization of transmission lines in thin-film multichip modules

Michael B. Steer, Paul D. Franzon, Andreas C. Cangellaris, 1996 .

Load characterization of high displacement piezoelectric actuators with various end conditions

Paul D. Franzon, Edward Grant, Timothy D. Usher, 2001 .

From Deep Submicron Degradation Effects to Harsh Operating Environments

Paul D. Franzon, Eric J. Wyers, 2016 .

Experimental characterization of interconnects and discontinuities in thin-film multichip module substrates

Michael B. Steer, Paul D. Franzon, Steve Lipa, 1993, Proceedings of IEEE Electrical Performance of Electronic Packaging.

A High K Nanocomposite for High Density Chip-to-Package Interconnections

Michael B. Steer, Paul D. Franzon, Stephen Mick, 2004 .

Microwave characterization of thin-film multi-chip module substrates and printed wiring boards accounting for frequency-dependent characteristic impedance

Michael B. Steer, Paul D. Franzon, 1992, [1992 Proceedings] Electrical Performance of Electronic Packaging.