M. Ker

发表

Design of charge pump circuit with consideration of gate-oxide reliability in low-voltage CMOS processes

Ming-Dou Ker, Shih-Lun Chen, Chia-Shen Tsai, 2006, IEEE J. Solid State Circuits.

On-Chip High-Voltage Charge Pump Circuit in Standard CMOS Processes With Polysilicon Diodes

M. Ker, Shih-Lun Chen, 2005, 2005 IEEE Asian Solid-State Circuits Conference.

Investigation on RF Characteristics of Stacked P-I-N Polysilicon Diodes for ESD Protection Design in 0.18-μm CMOS Technology

M. Ker, Yu-Da Shiu, Che-Hao Chuang, 2006, 2006 International Symposium on VLSI Technology, Systems, and Applications.

Self-substrate-triggered technique to enhance turn-on uniformity of multi-finger ESD protection devices

Ming-Dou Ker, Jia-Huei Chen, Kuo-Chun Hsu, 2006, IEEE VLSI-TSA International Symposium on VLSI Technology, 2005. (VLSI-TSA-Tech)..

Whole-chip ESD protection design with efficient VDD-to-VSS ESD clamp circuits for submicron CMOS VLSI

M. Ker, 1999 .

Overview and Design of Mixed-Voltage I/O Buffers With Low-Voltage Thin-Oxide CMOS Transistors

Chia-Sheng Tsai, Ming-Dou Ker, Shih-Lun Chen, 2006, IEEE Transactions on Circuits and Systems I: Regular Papers.

Substrate-triggered ESD protection circuit without extra process modification

Tung-Yang Chen, Ming-Dou Ker, M. Ker, 2003 .

Design of Integrated Gate Driver With Threshold Voltage Drop Cancellation in Amorphous Silicon Technology for TFT-LCD Application

M. Ker, Li-Wei Chu, Po-Tsun Liu, 2011, Journal of Display Technology.

Robust ESD Protection Design for 40-Gb/s Transceiver in 65-nm CMOS Process

Chun-Yu Lin, Li-Wei Chu, Ming-Dou Ker, 2013, IEEE Transactions on Electron Devices.

Power-Rail ESD Clamp Circuit With Diode-String ESD Detection to Overcome the Gate Leakage Current in a 40-nm CMOS Process

M. Ker, F. Altolaguirre, 2013, IEEE Transactions on Electron Devices.

Study of intrinsic characteristics of ESD protection diodes for high-speed I/O applications

Ming-Dou Ker, Chih-Ting Yeh, M. Ker, 2012, Microelectron. Reliab..

Implantable Stimulator for Epileptic Seizure Suppression With Loading Impedance Adaptability

Chun-Yu Lin, Ming-Dou Ker, Wei-Ling Chen, 2013, IEEE Transactions on Biomedical Circuits and Systems.

Live demonstration: Implantable stimulator for epileptic seizure suppression with loading impedance adaptability

M. Ker, Chun-Yu Lin, Wei-Ling Chen, 2012, 2012 IEEE Biomedical Circuits and Systems Conference (BioCAS).

Stimulus driver for epilepsy seizure suppression with adaptive loading impedance.

M. Ker, Chun-Yu Lin, Wei-Ling Chen, 2011, Journal of neural engineering.

SCR device with double-triggered technique for on-chip ESD protection in sub-quarter-micron silicided CMOS processes

Ming-Dou Ker, Kuo-Chun Hsu, M. Ker, 2003 .

2xVDD-Tolerant Power-Rail ESD Clamp Circuit With Low Standby Leakage in 65-nm CMOS Process

M. Ker, Chun-Yu Lin, 2010, ISCAS 2010.

A microvalve cell printing technique using riboflavin photosensitizer for selective cell patterning onto a retinal chip

G. Wallace, M. Ker, Johnson H Y Chung, 2020 .

A Fully Integrated 8-Channel Closed-Loop Neural-Prosthetic CMOS SoC for Real-Time Epileptic Seizure Control

Chung-Yu Wu, Sheng-Fu Liang, M. Ker, 2013, IEEE Journal of Solid-State Circuits.

Investigating electron depletion effect in amorphous indium–gallium–zinc-oxide thin-film transistor with a floating capping metal by technology computer-aided design simulation and leakage reduction

M. Ker, H. Zan, Ting-Chou Lu, 2014 .

Design of On-Chip ESD Protection Circuits with Consideration of Gate-Oxide Reliability

M. Ker, StudentWen-Yi Chen, Wen-Yi Chen, 2005 .

Design on the low-leakage diode string for using in the power-rail ESD clamp circuits in a 0.35-/spl mu/m silicide CMOS process

Ming-Dou Ker, Wen-Yu Lo, M. Ker, 2000, IEEE Journal of Solid-State Circuits.

ESD implantation for subquarter-micron CMOS technology to enhance ESD robustness

Ming-Dou Ker, Hsin-Chyh Hsu, Jeng-Jie Peng, 2003 .

Power-Rail ESD Clamp Circuit with Polysilicon Diodes Against False Trigger During Fast Power-on Events

M. Ker, Jie-Ting Chen, 2018, 2018 40th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD).

Design and implementation of capacitive sensor readout circuit on glass substrate for touch panel applications

Ming-Dou Ker, Tzu-Ming Wang, M. Ker, 2011, Proceedings of 2011 International Symposium on VLSI Design, Automation and Test.

ESD protection design for 900-MHz RF receiver with 8-kV HBM ESD robustness

Chien-Ming Lee, Ming-Dou Ker, Hong-Sing Kao, 2002, 2002 IEEE MTT-S International Microwave Symposium Digest (Cat. No.02CH37278).

Study on CDM ESD Robustness Among On-Chip Decoupling Capacitors in CMOS Integrated Circuits

M. Ker, Yi-Chun Huang, 2021, IEEE Journal of the Electron Devices Society.

A CMOS bandgap reference circuit for sub-1-V operation without using extra low-threshold-voltage device

Ming-Dou Ker, Jung-Sheng Chen, Ching-Yun Chu, 2004 .

Improvement on Turn-on Speed of Substrate-Triggered SCR Device by Using Dummy-Gate Structure for On-Chip ESD Protection

Ming-Dou Ker, Kuo-Chun Hsu, M. Ker, 2003 .

Design on the Low-Leakage-Current Diode String for ESD Protection in SiGe BiCMOS Process

M. Ker, 2005 .

ESD protection design with the low-leakage-current diode string for RF circuits in BiCMOS SiGe process

Ming-Dou Ker, Woei-Lin Wu, M. Ker, 2005, 2005 Electrical Overstress/Electrostatic Discharge Symposium.

Design of Fin-Diode-Triggered Rotated Silicon-Controlled Rectifier for High- Speed Digital Application in 16-nm FinFET Process

Chun-Yu Lin, Ming-Dou Ker, M. Ker, 2020, IEEE Transactions on Electron Devices.

Diode-Triggered Silicon-Controlled Rectifier With Reduced Voltage Overshoot for CDM ESD Protection

E. Rosenbaum, Wen-Yi Chen, M. Ker, 2012, IEEE Transactions on Device and Materials Reliability.

CMOS chip as luminescent sensor for biochemical reactions

Chung-Yu Wu, Ming-Dou Ker, Wensyang Hsu, 2003 .

On-Chip Transient Detection Circuit with SCR as Memory Unit for System-Level ESD Protection

M. Ker, Wan-Yen Lin, 2011 .

Introductory Invited Paper Overview on ESD protection design for mixed-voltage I/O interfaces with high-voltage-tolerant power-rail ESD clamp circuits in low-voltage thin-oxide CMOS technology q

M. Ker, W. Chang, 2006 .

Dependences of damping frequency and damping factor of bi-polar trigger waveforms on transient-induced latchup

M. Ker, Sheng-Fu Hsu, 2005, 2005 Electrical Overstress/Electrostatic Discharge Symposium.

Design of a Bone-Guided Cochlear Implant Microsystem With Monopolar Biphasic Multiple Stimulations and Evoked Compound Action Potential Acquisition and Its In Vivo Verification

Chung-Yu Wu, M. Ker, C. Hung, 2021 .

Novel electrostatic discharge protection design for nanoelectronics in nanoscale CMOS technology

M. Ker, Tang-Kui Tseng, 2003, 2003 Third IEEE Conference on Nanotechnology, 2003. IEEE-NANO 2003..

Novel diode structures and ESD protection circuits in a 1.8-V 0.15-/spl mu/m partially-depleted SOI salicided CMOS process

Ming-Dou Ker, M. Ker, Howard Tang, 2001, Proceedings of the 2001 8th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2001 (Cat. No.01TH8548).

A 13.56 MHz Metamaterial for the Wireless Power Transmission Enhancement in Implantable Biomedical Devices

Chung-Yu Wu, M. Ker, Yu-Ting Cheng, 2019, 2019 20th International Conference on Solid-State Sensors, Actuators and Microsystems & Eurosensors XXXIII (TRANSDUCERS & EUROSENSORS XXXIII).

A Fully Integrated 8-Channel Closed-Loop Neural-Prosthetic CMOS SoC for Real-Time Epileptic Seizure Control

Sheng-Fu Liang, Chia-Hsiang Yang, Chun-Yu Lin, 2013, IEEE Journal of Solid-State Circuits.

Design on mixed-voltage-tolerant I/O interface with novel tracking circuits in a 0.13-/spl mu/m CMOS technology

Ming-Dou Ker, Che-Hao Chuang, M. Ker, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

On-Glass Bandgap Voltage Reference Circuit in a 3-μ m LTPS Process

M. Ker, Chun-Ting Liu, H. Zan, 2008 .

Energy Transformation Between the Inductor and the Power Transistor for the Unclamped Inductive Switching (UIS) Test

M. Ker, Jian-Hsing Lee, Shao-Chang Huang, 2020, IEEE Transactions on Device and Materials Reliability.

Dual SCR with low-and-constant parasitic capacitance for ESD protection in 5-GHz RF integrated circuits

M. Ker, Chun-Yu Lin, 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

Co-Design on Broadband CMOS RF Distributed Amplifier With On-Chip ESD Protection Circuit

M. Ker, Yuan-Wen Hsiao, B. Kuo, 2004 .

Design and implementation of readout circuit on glass substrate with digital correction for touch‐panel applications

M. Ker, Tzu-Ming Wang, 2011 .

P‐40: Design of Analog Pixel Memory Circuit with Low Temperature Polycrystalline Silicon TFTs for Low Power Application

M. Ker, Li-Wei Chu, Po-Tsun Liu, 2010 .

Temperature Coefficient of Poly-Silicon TFT and its Application on Voltage Reference Circuit With Temperature Compensation in LTPS Process

M. Ker, H. Zan, Ting-Chou Lu, 2008, IEEE Transactions on Electron Devices.

CMOS RF VCO Design with Substrate Noise Consideration

M. Ker, C. Chien, 2005 .

Circuit Design of Crystal Oscillator in Mixed-Voltage-Tolerant I/O Interfaces with Low-Voltage Devices

M. Ker, Hung-Tai Liao, 2007 .

(73) Asslgnee' Internatlenal Busmess Machmes Pump Circuit with Consideration of Gate-oxide Reliability in Low Corporatlon' Armonk' Ny (us) Voltage Cmos Processes, " Ieee Journal of Solid-state Circuits, Vol

M. Ker, Shih-Lun Chen, Chia-Shen Tsai, 2022 .

ESD HBM Discharge Model in RF GaN-on-Si (MIS)HEMTs

N. Collaert, A. Sibaja-Hernandez, B. Parvais, 2022, IEEE Transactions on Electron Devices.

Verification of the beta oscillations in the subthalamic nucleus of the MPTP-induced parkinsonian minipig model

M. Ker, Chi-Wei Huang, Hsiao-Chun Lin, 2022, Brain Research.

Design of Analog Output Buffer With Level Shifting Function on Glass Substrate for Panel Application

M. Ker, Tzu-Ming Wang, Sao-Chi Chen, 2009, Journal of Display Technology.

Synthesis of uniform core–shell gelatin–alginate microparticles as intestine‐released oral delivery drug carrier

M. Ker, A. Grumezescu, Keng-Shiang Huang, 2014, Electrophoresis.

Design and Realization of Delta-Sigma A/D Converter in LTPS Technology

M. Ker, Chia-Chi Tsai, 2009 .

Optimization Design on Active Guard Ring to Improve Latch-Up Immunity of CMOS Integrated Circuits

M. Ker, Chun-Cheng Chen, 2019, IEEE Transactions on Electron Devices.

Latchup in bulk FinFET technology

N. Horiguchi, D. Linten, M. Ker, 2017, 2017 IEEE International Reliability Physics Symposium (IRPS).

Modeling the positive-feedback regenerative process of CMOS latchup by a positive transient pole method. II. Quantitative evaluation

Chung-Yu Wu, Ming-Dou Ker, Chung-Yu Wu, 1995 .

Modeling the positive-feedback regenerative process of CMOS latchup by a positive transient pole method. I. theoretical derivation

Chung-Yu Wu, Ming-Dou Ker, Chung-Yu Wu, 1995 .

Transient analysis of submicron CMOS latchup with a physical criterion

Chung-Yu Wu, Ming-Dou Ker, Chung-Yu Wu, 1994 .

Evaluation of subcortical grey matter abnormalities in patients with MRI-negative cortical epilepsy determined through structural and tensor magnetic resonance imaging

Chung-Yu Wu, Ming-Dou Ker, Herming Chiueh, 2014, BMC Neurology.

Through Diffusion Tensor Magnetic Resonance Imaging to Evaluate the Original Properties of Neural Pathways of Patients with Partial Seizures and Secondary Generalization by Individual Anatomic Reference Atlas

Chung-Yu Wu, M. Ker, Y. Hsin, 2014, BioMed research international.

Design of Multi-Channel Monopolar Biphasic Stimulator for Implantable Biomedical Applications

Ming-Dou Ker, Chia-Chi Hsieh, M. Ker, 2018, 2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS).

A Fully Integrated 16-Channel Closed-Loop Neural-Prosthetic CMOS SoC With Wireless Power and Bidirectional Data Telemetry for Real-Time Efficient Human Epileptic Seizure Control

Sheng-Fu Liang, Chung-Yu Wu, Ming-Dou Ker, 2018, IEEE Journal of Solid-State Circuits.

Study on the ESD-induced gate-oxide breakdown and the protection solution in 28nm high-k metal-gate CMOS technology

Chun-Yu Lin, Ming-Dou Ker, Wen-Tai Wang, 2015, 2015 IEEE Nanotechnology Materials and Devices Conference (NMDC).

Area-Efficient On-Chip Transient Detection Circuit for System-Level ESD Protection Against Transient-Induced Malfunction

M. Ker, Wen-Chieh Chen, 2019, IEEE Transactions on Device and Materials Reliability.

Design of Compact ESD Protection Circuit for V-Band RF Applications in a 65-nm CMOS Technology

Chun-Yu Lin, Li-Wei Chu, Ming-Dou Ker, 2012, IEEE Transactions on Device and Materials Reliability.

ESD protection design for 1- to 10-GHz distributed amplifier in CMOS technology

Ming-Dou Ker, Yuan-Wen Hsiao, Bing-Jye Kuo, 2005 .

A CMOS-Process-Compatible Low-Voltage Junction-FET With Adjustable Pinch-Off Voltage

M. Ker, K. Nidhi, 2017, IEEE Transactions on Electron Devices.

Monopolar Biphasic Stimulator With Discharge Function and Negative Level Shifter for Neuromodulation SoC Integration in Low-Voltage CMOS Process

Ming-Dou Ker, Chia-Chi Hsieh, M. Ker, 2021, IEEE Transactions on Biomedical Circuits and Systems.

A High-Voltage-Tolerant and Precise Charge-Balanced Neuro-Stimulator in Low Voltage CMOS Process

Ming-Dou Ker, Zhicong Luo, M. Ker, 2016, IEEE Transactions on Biomedical Circuits and Systems.

Fabrication of a miniature CMOS-based optical biosensor.

Chung-Yu Wu, Ming-Dou Ker, Jung-Sheng Chen, 2007, Biosensors & bioelectronics.

CORDIC implementation of RSSI localization method

Yu-Jung Huang, Ming-Dou Ker, Pei-Ju Lin, 2010, 2010 Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia).

Investigation of Unexpected Latchup Path Between HV-LDMOS and LV-CMOS in a 0.25- $\mu \text{m}$ 60-V/5-V BCD Technology

Ming-Dou Ker, Chia-Tsen Dai, M. Ker, 2017, IEEE Transactions on Electron Devices.

Improving Safe Operating Area of nLDMOS Array With Embedded Silicon Controlled Rectifier for ESD Protection in a 24-V BCD Process

Ming-Dou Ker, Wen-Yi Chen, M. Ker, 2011, IEEE Transactions on Electron Devices.

Design of Dual-Mode Stimulus Chip With Built-In High Voltage Generator for Biomedical Applications

Ming-Dou Ker, Ting-Yang Yen, M. Ker, 2020, IEEE Transactions on Biomedical Circuits and Systems.

An Efficient, Wide-Output, High-Voltage Charge Pump With a Stage Selection Circuit Realized in a Low-Voltage CMOS Process

Ming-Dou Ker, Zhicong Luo, Li-Chin Yu, 2019, IEEE Transactions on Circuits and Systems I: Regular Papers.

New Ballasting Layout Schemes to Improve ESD Robustness of I/O Buffers in Fully Silicided CMOS Process

Ming-Dou Ker, Wuu-Trong Shieh, I-Ju Wei, 2009, IEEE Transactions on Electron Devices.

Methodology on extracting compact layout rules for latchup prevention in deep-submicron bulk CMOS technology

Ming-Dou Ker, Wen-Yu Lo, M. Ker, 2003 .

Overview of on-Chip Stimulator Designs for Biomedical Applications

Ming-Dou Ker, Chun-Yu Lin, M. Ker, 2012 .

Design of bandgap voltage reference circuit with all TFT devices on glass substrate in a 3-μm LTPS process

Ting-Chou Lu, Hsiao-Wen Zan, Ming-Dou Ker, 2008, 2008 IEEE Custom Integrated Circuits Conference.

P‐61: Temperature Coefficient of Diode‐Connected LTPS Poly‐Si TFTs and its Application on the Bandgap Reference Circuit

M. Ker, Chun-Ting Liu, H. Zan, 2008 .

Low-Capacitance SCR With Waffle Layout Structure for On-Chip ESD Protection in RF ICs

Chun-Yu Lin, Ming-Dou Ker, M. Ker, 2007, IEEE Transactions on Microwave Theory and Techniques.

ESD Protection Design With Low-Capacitance Consideration for High-Speed/High-Frequency I/O Interfaces in Integrated Circuits

Ming-Dou Ker, Yuan-Wen Hsiao, M. Ker, 2007 .

ESD protection design for CMOS RF integrated circuits

Ming-Dou Ker, Chyh-Yih Chang, M. Ker, 2002, 2001 Electrical Overstress/Electrostatic Discharge Symposium.

An ESD-protected 5-GHz differential low-noise amplifier in a 130-nm CMOS process

Ming-Dou Ker, Yuan-Wen Hsiao, M. Ker, 2008, 2008 IEEE Custom Integrated Circuits Conference.

Native-NMOS-Triggered SCR With Faster Turn-On Speed for Effective ESD Protection in a 0.13-$rm murm m$CMOS Process

K.-C. Hsu, M.-D. Ker, M. Ker, 2005, IEEE Transactions on Device and Materials Reliability.

Design of 2.4-GHz T/R switch with embedded ESD protection devices in CMOS process

Chun-Yu Lin, Ming-Dou Ker, Rui-Hong Liu, 2017, Microelectron. Reliab..

Latchup current self-stop circuit for whole-chip latchup prevention in bulk CMOS integrated circuits

Ming-Dou Ker, Jeng-Jie Peng, Hsin-Chin Jiang, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

ESD test methods on integrated circuits: an overview

Ming-Dou Ker, Jeng-Jie Peng, Hsin-Chin Jiang, 2001, ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483).

ON-State Human Body Model ESD Failure Mechanisms in GaN-on-Si RF MIS-HEMTs

N. Collaert, B. Parvais, M. Ker, 2023, IEEE Electron Device Letters.

Optimization of Guard Ring Structures to Improve Latchup Immunity in an 18 V DDDMOS Process

Ming-Dou Ker, Chia-Tsen Dai, M. Ker, 2016, IEEE Transactions on Electron Devices.

Design of Stage-Selective Negative Voltage Generator to Improve On-Chip Power Conversion Efficiency for Neuron Stimulation

Ming-Dou Ker, Shiau-Pin Lin, M. Ker, 2020, IEEE Transactions on Circuits and Systems I: Regular Papers.

Design of Multiple-Charge-Pump System for Implantable Biomedical Applications

Ming-Dou Ker, Shiau-Pin Lin, M. Ker, 2018, 2018 IEEE Biomedical Circuits and Systems Conference (BioCAS).

ESD self-protection design on 2.4-GHz T/R switch for RF application in CMOS process

Chun-Yu Lin, Ming-Dou Ker, Rui-Hong Liu, 2016, 2016 IEEE International Reliability Physics Symposium (IRPS).

Ultra Low-Capacitance Bond Pad for RF Applications in CMOS Technology

Ming-Dou Ker, Yuan-Wen Hsiao, M. Ker, 2007, 2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium.

Design of Dual-Band ESD Protection for 24-/60-GHz Millimeter-Wave Circuits

Chun-Yu Lin, Li-Wei Chu, Ming-Dou Ker, 2013, IEEE Transactions on Device and Materials Reliability.

ESD Protection Design for 60-GHz LNA With Inductor-Triggered SCR in 65-nm CMOS Process

Chun-Yu Lin, Li-Wei Chu, Ming-Dou Ker, 2012, IEEE Transactions on Microwave Theory and Techniques.

Overview on ESD Protection Designs of Low-Parasitic Capacitance for RF ICs in CMOS Technologies

Chun-Yu Lin, Ming-Dou Ker, Yuan-Wen Hsiao, 2011, IEEE Transactions on Device and Materials Reliability.

Self-matched ESD cell in CMOS technology for 60-GHz broadband RF applications

Chun-Yu Lin, Li-Wei Chu, Ming-Dou Ker, 2010, 2010 IEEE Radio Frequency Integrated Circuits Symposium.

Overview of on-chip electrostatic discharge protection design with SCR-based devices in CMOS integrated circuits

Ming-Dou Ker, K.-C. Hsu, M. Ker, 2005, IEEE Transactions on Device and Materials Reliability.

A novel LC-tank ESD protection design for Giga-Hz RF circuits

Ming-Dou Ker, Chien-Ming Lee, Chien-I Chou, 2003, IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003.

MOS-Bounded Diodes for On-Chip ESD Protection in Deep Submicron CMOS Process

Ming-Dou Ker, Che-Hao Chuang, Kun-Hsien Lin, 2005, IEICE Trans. Electron..

From Bioelectronics to Nanobioelectronics: The Biomedical Electronics Translational Research Center [Highlights]

Ming-Dou Ker, Chung-Yu Wu, Chung-Yu Wu, 2021, IEEE Nanotechnology Magazine.

Ultra-High-Voltage Charge Pump Circuit in Low-Voltage Bulk CMOS Processes With Polysilicon Diodes

Ming-Dou Ker, Shih-Lun Chen, M. Ker, 2007, IEEE Transactions on Circuits and Systems II: Express Briefs.

A Digitally Dynamic Power Supply Technique for 16-Channel 12 V-Tolerant Stimulator Realized in a 0.18- μm 1.8-V/3.3-V Low-Voltage CMOS Process

Ming-Dou Ker, Tzu-Yi Yang, Wan-Hsueh Cheng, 2017, IEEE Transactions on Biomedical Circuits and Systems.

High-voltage-tolerant stimulator with adaptive loading consideration for electronic epilepsy prosthetic SoC in a 0.18-µm CMOS process

Chun-Yu Lin, Ming-Dou Ker, Yi-Ju Li, 2012, 10th IEEE International NEWCAS Conference.

Design of stimulus driver to suppress epileptic seizure with adaptive loading consideration

Chun-Yu Lin, Ming-Dou Ker, Wei-Ling Chen, 2010, 2010 International Symposium on Next Generation Electronics.

Design of Dual-Configuration Dual-Mode Stimulator in Low-Voltage CMOS Process for Neuro-Modulation

M. Ker, Yi-Hui Wu, Chia-Chi Hsieh, 2023, IEEE Transactions on Biomedical Circuits and Systems.

A fully integrated 8-channel closed-loop neural-prosthetic SoC for real-time epileptic seizure control

Chih-Wei Chang, Sheng-Fu Liang, Chun-Yu Lin, 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

A High-Voltage-Tolerant and Power-Efficient Stimulator With Adaptive Power Supply Realized in Low-Voltage CMOS Process for Implantable Biomedical Applications

Ming-Dou Ker, Zhicong Luo, M. Ker, 2018, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

Method to evaluate cable discharge event (CDE) reliability of integrated circuits in CMOS technology

Ming-Dou Ker, Tai-Xiang Lai, M. Ker, 2006, 7th International Symposium on Quality Electronic Design (ISQED'06).

Editorial: Microelectronic Implants for Central and Peripheral Nervous System: Overview of Circuit and System Technology

M. Ker, A. Schmid, T. Tokuda, 2021, Frontiers in Neuroscience.

ESD (Electrostatic Discharge) Protection Design for Nanoelectronics in CMOS Technology

Ming-Dou Ker, M. Ker, 2006, 2006 Advanced Signal Processing, Circuit and System Design Techniques for Communications.

Optimization of broadband RF performance and ESD robustness by π-model distributed ESD protection scheme

Ming-Dou Ker, Bing-Jye Kuo, M. Ker, 2004, 2004 Electrical Overstress/Electrostatic Discharge Symposium.

Decreasing-size distributed ESD protection scheme for broad-band RF circuits

Ming-Dou Ker, Bing-Jye Kuo, M. Ker, 2005, IEEE Transactions on Microwave Theory and Techniques.

ESD protection design for broadband RF circuits with decreasing-size distributed protection scheme

Ming-Dou Ker, Bing-Jye Kuo, M. Ker, 2004, 2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers.