S. Denorme

发表

FDSOI devices with thin BOX and ground plane integration for 32nm node and below

E. Deloffre, O. Faynot, T. Skotnicki, 2008 .

Fully-depleted SOI CMOS technology using WXN metal gate and HfSixOyNZ high-k dielectric

O. Faynot, M. Orlowski, T. Skotnicki, 2007, ESSDERC 2007 - 37th European Solid State Device Research Conference.

Silicon MOSFETs as room temperature terahertz detectors

Thomas Skotnicki, N. Dyakonova, Dominique Coquillat, 2009 .

28nm advanced CMOS resistive RAM solution as embedded non-volatile memory

E. Vianello, J. Nodin, H. Grampeix, 2014, 2014 IEEE International Reliability Physics Symposium.

Demonstration of Enhanced Base Diffusion Due to Extrinsic Base Implantations in Submicron, Polysilicon-Emitter, Epitaxial Base Bipolar Transistors

S. Denorme, A. Chantre, M. Mouis, 1995, ESSDERC '95: Proceedings of the 25th European Solid State Device Research Conference.

Ultra-Thin (4nm) Gate-All-Around CMOS devices with High-k/Metal for Low Power Multimedia Applications

Nicolas Loubet, Stephane Monfray, G. Bidal, 2010 .

Silicon-On-Nothing (SON) applications for Low Power technologies

G. Bidal, T. Skotnicki, S. Monfray, 2008, 2008 IEEE International Conference on Integrated Circuit Design and Technology and Tutorial.

Gate-All-Around technology: taking advantage of ballistic transport ?

G. Ghibaudo, T. Skotnicki, S. Monfray, 2009, ESSDERC 2009.

ADVANCED SOLUTIONS FOR MOBILITY ENHANCEMENT IN SOI MOSFETS

O. Faynot, G. Ghibaudo, T. Skotnicki, 2011 .

Hybrid Localized SOI/bulk technology for low power system-on-chip

O. Faynot, G. Ghibaudo, T. Skotnicki, 2010, 2010 Symposium on VLSI Technology.

Mechanical and Electrical Analysis of Strained Liner Effect in 35 nm Fully Depleted Silicon-on-Insulator Devices with Ultra Thin Silicon Channels

T. Skotnicki, R. Pantel, C. Fenouillet-Béranger, 2006 .

Impact of a 10nm Ultra-Thin BOX (UTBOX) and Ground Plane on FDSOI devices for 32nm node and below

O. Faynot, F. Andrieu, T. Skotnicki, 2010, 2009 Proceedings of ESSCIRC.

FDSOI devices with thin BOX and ground plane integration for 32nm node and below

X. Garros, O. Faynot, C. Laviron, 2008, ESSDERC 2008 - 38th European Solid-State Device Research Conference.

High-Performance High-$K$/Metal Planar Self-Aligned Gate-All-Around CMOS Devices

T. Skotnicki, F. Leverd, D. Dutartre, 2008, IEEE Transactions on Nanotechnology.

Thin-film devices for low power applications

Nicolas Loubet, Stephane Monfray, Claire Fenouillet-Beranger, 2010 .

Folded fully depleted FET using Silicon-On-Nothing technology as a highly W-scaled planar solution

C. Laviron, Stephane Monfray, Claire Fenouillet-Beranger, 2009, ESSDERC 2009.

Two-dimensional modeling of the enhanced diffusion in thin base n-p-n bipolar transistors after lateral ion implantations

M. Mouis, S. Denorme, P. Dollfus, 1995 .

Effect of SET temperature on data retention performances of HfO2-based RRAM cells

C. Muller, S. Jeannot, E. Vianello, 2014, 2014 IEEE 6th International Memory Workshop (IMW).

Endurance/Retention Trade Off in HfOx and TaOx Based RRAM

S. Jeannot, E. Vianello, L. Perniola, 2016, 2016 IEEE 8th International Memory Workshop (IMW).

Efficient multi-VT FDSOI technology with UTBOX for low power circuit design

O. Faynot, F. Andrieu, T. Skotnicki, 2010, 2010 Symposium on VLSI Technology.

Hybrid FDSOI/bulk High-k/metal gate platform for low power (LP) multimedia technology

X. Garros, O. Faynot, D. Noblet, 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

Impact of a 10nm Ultra-Thin BOX (UTBOX) and Ground Plane on FDSOI devices for 32nm node and below

T. Skotnicki, Sébastien Haendler, F. Leverd, 2009, 2009 Proceedings of the European Solid State Device Research Conference.

Fully-depleted SOI technology using high-k and single-metal gate for 32 nm node LSTP applications featuring 0.179 μm2 6T-SRAM bitcell

O. Faynot, V. Arnal, A. Vandooren, 2007, 2007 IEEE International Electron Devices Meeting.

Selective etching of Si1 − xGex versus Si with gaseous HCl for the formation of advanced CMOS devices

Nicolas Loubet, Stephane Denorme, Didier Dutartre, 2008 .

Improvement of performances HfO 2 -based RRAM from elementary cell to 16 kb demonstrator by introduction of thin layer of Al 2 O 3

Claire Fenouillet-Beranger, Stephane Denorme, Elisa Vianello, 2016 .

Accurate two-dimensional modelling of the titanium silicide process with an application to a thin base n-p-n bipolar transistor

M. Mouis, S. Denorme, A. Poncet, 1998 .