M. Marin

发表

FDSOI devices with thin BOX and ground plane integration for 32nm node and below

E. Deloffre, O. Faynot, T. Skotnicki, 2008 .

Effects of body biasing on the low frequency noise of MOSFETs from a 130 nm CMOS technology

M. Marin, M. Deen, P. Llinares, 2004 .

Impact of Technological Parameters on the Low Frequency Noise of Advanced Heterojunction Bipolar Transistors

J. Raoult, M. Marin, M. Deen, 2007 .

FDSOI devices with thin BOX and ground plane integration for 32nm node and below

X. Garros, O. Faynot, C. Laviron, 2008, ESSDERC 2008 - 38th European Solid-State Device Research Conference.

Dc and low frequency noise analysis of hot-carrier induced degradation of low complexity 0.13 mum CMOS bipolar transistors

C. Delseny, B. Martinet, J. C. Vildeuil, 2005, Microelectron. Reliab..

Impact of scaling down on 1/f noise in MOSFETs

M. Marin, Alain Hoffmann, M. Valenza, 2003, SPIE International Symposium on Fluctuations and Noise.

Low frequency noise characterization in 0.13 mum p-MOSFETs. Impact of scaled-down 0.25, 0.18 and 0.13 mum technologies on 1/f noise

P. Llinares, J. C. Vildeuil, M. Marin, 2004, Microelectron. Reliab..

1/f noise in 0.18 μm technology n-MOSFETs from subthreshold to saturation

M. Marin, P. Llinares, Y. Akue Allogo, 2002 .

Impact of carbon concentration on 1∕f noise and random telegraph signal noise in SiGe:C heterojunction bipolar transistors

M. J. Deen, M. Marin, C. Delseny, 2008 .

High immunity to threshold voltage variability in undoped ultra-thin FDSOI MOSFETs and its physical understanding

O. Rozeau, O. Faynot, F. Andrieu, 2008, 2008 IEEE International Electron Devices Meeting.