Ben Keller

发表

A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC–DC Converters in 28 nm FDSOI

Elad Alon, Philippe Flatresse, Borivoje Nikolic, 2016, IEEE Journal of Solid-State Circuits.

Adam M. Izraelevitz, Huy D. Vo, Albert J. Ou, 2016 .

An Agile Approach to Building RISC-V Microprocessors

David Patterson, Alberto Puggelli, Elad Alon, 2016, IEEE Micro.

A $225~\mu \text{m}^{2}$ Probe Single-Point Calibration Digital Temperature Sensor Using Body-Bias Adjustment in 28 nm FD-SOI CMOS

B. Nikolić, Ben Keller, P. Roche, 2018, IEEE Solid-State Circuits Letters.

Simba

C. T. Gray, W. Dally, Rangharajan Venkatesan, 2019, Communications of the ACM.

Long-tail behavior of process variation with application to domino keeper sizing

David Money Harris, Ben Keller, Ben Keller, 2010, 2010 53rd IEEE International Midwest Symposium on Circuits and Systems.

A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-based Deep Neural Network Accelerator with Ground-Reference Signaling in 16nm

William J. Dally, Brucek Khailany, Stephen G. Tell, 2019, 2019 Symposium on VLSI Circuits.

A 0.32–128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm

William J. Dally, Yanqing Zhang, Brucek Khailany, 2020, IEEE Journal of Solid-State Circuits.

Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture

William J. Dally, Yanqing Zhang, Brucek Khailany, 2019, MICRO.

Simba

C. T. Gray, W. Dally, Rangharajan Venkatesan, 2021, Commun. ACM.

HEAT: Hardware-Efficient Automatic Tensor Decomposition for Transformer Compression

Anima Anandkumar, Jean Kossaifi, Ben Keller, 2022, ArXiv.

Accelerating Chip Design With Machine Learning

William J. Dally, Yanqing Zhang, Brucek Khailany, 2020, IEEE Micro.

A 17–95.6 TOPS/W Deep Learning Inference Accelerator with Per-Vector Scaled 4-bit Quantization for Transformers in 5nm

C. T. Gray, W. Dally, Rangharajan Venkatesan, 2022, 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).

PRIMAL: Power Inference using Machine Learning

Yuan Zhou, Zhiru Zhang, Brucek Khailany, 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

A 95.6-TOPS/W Deep Learning Inference Accelerator With Per-Vector Scaled 4-bit Quantization in 5 nm

C. T. Gray, W. Dally, Rangharajan Venkatesan, 2023, IEEE Journal of Solid-State Circuits.

MAGNet: A Modular Accelerator Generator for Neural Networks

William J. Dally, Brucek Khailany, Jason Clemons, 2019, 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

A Fine-Grained GALS SoC with Pausible Adaptive Clocking in 16 nm FinFET

William J. Dally, Brucek Khailany, Stephen G. Tell, 2019, 2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC).

A Pausible Bisynchronous FIFO for GALS Systems

Brucek Khailany, Matthew Fojtik, Ben Keller, 2015, 2015 21st IEEE International Symposium on Asynchronous Circuits and Systems.

AutoDMP: Automated DREAMPlace-based Macro Placement

Ben Keller, Anthony Agnesina, Haoxing Ren, 2023, ISPD.

A 0.11 PJ/OP, 0.32-128 Tops, Scalable Multi-Chip-Module-Based Deep Neural Network Accelerator Designed with A High-Productivity vlsi Methodology

William J. Dally, Yanqing Zhang, Brucek Khailany, 2019, 2019 IEEE Hot Chips 31 Symposium (HCS).

IPA: Floorplan-Aware SystemC Interconnect Performance Modeling and Generation for HLS-based SoCs

Brucek Khailany, Rangharajan Venkatesan, Ben Keller, 2021, 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD).

A Dual-Core RISC-V Vector Processor With On-Chip Fine-Grain Power Management in 28-nm FD-SOI

Colin Schmidt, Nandish Mehta, Ben Keller, 2020, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI

Elad Alon, Borivoje Nikolić, Brian Zimmer, 2017, IEEE Journal of Solid-State Circuits.

Opportunities for Fine-Grained Adaptive Voltage Scaling to Improve System-Level Energy Efficiency

Borivoje Nikolic, Ben Keller, B. Nikolić, 2015 .

AutoDMP: Automated DREAMPlace-based Macro Placement

Ben Keller, Anthony Agnesina, Haoxing Ren, 2023, ISPD.