H. Kawashima

A pixel size shrinkage of amplified MOS imager with two-line mixing

M. Yamawaki, H. Kawashima, N. Murata, 1996 .

Wideband Tunable Dispersion Compensator Using a 25-Stage PLC-MZI

H. Kawashima, K. Nara, 2009 .

Three-dimensional structures for high saturation signals and crosstalk suppression in 1.20 μm pixel back-illuminated CMOS image sensor

Y. Tateshita, T. Hirayama, S. Arakawa, 2013, 2013 IEEE International Electron Devices Meeting.

Effect of Microlens Array for Mos Color Imager

H. Kawashima, S. Uematsu, H. Saeki, 1985, IEEE Transactions on Consumer Electronics.

A 65-nm SoC Embedded 6T-SRAM Designed for Manufacturability With Read and Write Operation Stabilizing Circuits

K. Ishibashi, M. Yabuuchi, H. Makino, 2007, IEEE Journal of Solid-State Circuits.

Pixel/DRAM/logic 3-layer stacked CMOS image sensor technology

H. Kawashima, K. Murata, T. Nomoto, 2017, 2017 IEEE International Electron Devices Meeting (IEDM).

An 80 nm dual-gate CMOS with shallow extensions formed after activation annealing and SALICIDE

H. Kawashima, E. Morifuji, Y. Toyoshima, 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318).

An amplified MOS imager suited for image processing

Masayuki Sugawara, M. Yamawaki, Yoshihiro Fujita, 1994, Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94.

A 1/4 inch format 250 K pixel amplified MOS image sensor using CMOS process

H. Kawashima, F. Andoh, N. Murata, 1993, Proceedings of IEEE International Electron Devices Meeting.

The Scaling of Cu-Cu Hybrid Bonding For High Density 3D Chip Stacking

K. Takahashi, K. Tatani, S. Kadomura, 2019, 2019 Electron Devices Technology and Manufacturing Conference (EDTM).