P. Silverman

H. Vaidya, A. Ghetti, P. Silverman, 1999, 1999 International Conference on Simulation of Semiconductor Processes and Devices. SISPAD'99 (IEEE Cat. No.99TH8387).

Explanation of soft and hard breakdown and its consequences for area scaling

J. Bude, J. Bude, B. Weir, 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318).

Low leakage, ultra-thin gate oxides for extremely high performance sub-100 nm nMOSFETs

A. Agarwal, J. Jackson, F. Klemens, 1997, International Electron Devices Meeting. IEDM Technical Digest.

Gate dielectric breakdown: A focus on ESD protection

B. Weir, P. Silverman, M.A. Alam, 2004, 2004 IEEE International Reliability Physics Symposium. Proceedings.

A study of soft and hard breakdown - Part I: Analysis of statistical percolation conductance

Muhammad A. Alam, B. Weir, P. Silverman, 2002 .

Statistically independent soft breakdowns redefine oxide reliability specifications

M.A. Alam, R.K. Smith, B.E. Weir, 2002, Digest. International Electron Devices Meeting,.

Relationship between Interfacial Roughness and Dielectric Reliability for Silicon Oxynitride Gate Dielectrics Processed with Nitric Oxide

Martin L. Green, Jane P. Chang, B. Weir, 1999 .

Understanding the limits of ultrathin SiO 2 and Si-O-N gate dielectrics for sub-50 nm CMOS

Martin L. Green, D. Muller, B. Weir, 1999 .

Electrical Properties of Cobalt and Copper Contamination in Processed Silicon

P. Silverman, D. Jacobson, C. Rafferty, 2001 .

An anode hole injection percolation model for oxide breakdown-the "doom's day" scenario revisited

A. Ghetti, J. Bude, S. Moccio, 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318).

Explanation of stress-induced damage in thin oxides

P.J. Silverman, B. Weir, P. Silverman, 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

Multi-component high-K gate dielectrics for the silicon industry

Fred P. Klemens, Martin L. Green, Glen D. Wilk, 2001 .

Comparative Study of Experimental Techniques for Boron Profiling at Poly-Si/SiO2 Interface

J. Bude, P. Silverman, H. Luftman, 1995 .

The prospect of using thin oxides for silicon nanotransistors

M. Alam, B. Weir, P. Silverman, 2001, Extended Abstracts of International Workshop on Gate Insulator. IWGI 2001 (IEEE Cat. No.01EX537).

Progress toward 10 nm CMOS devices

A. Ghetti, P. Silverman, D.M. Tennant, 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

Gate oxides in 50 nm devices: thickness uniformity improves projected reliability

A. Ghetti, J. Madic, J.D. Bude, 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318).

50 nm vertical replacement-gate (VRG) nMOSFETs with ALD HfO/sub 2/ and Al/sub 2/O/sub 3/ gate dielectrics

T. Nigam, A. Kornblit, M.R. Baker, 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

The relentless march of the MOSFET gate oxide thickness to zero

Donald M. Tennant, A. Kornblit, Gregory Timp, 2000 .