J. Lee

发表

SeDAX: A Scalable, Resilient, and Secure Platform for Smart Grid Communications

Young-Jin Kim, Marina Thottan, Gary Atkinson, 2012, IEEE Journal on Selected Areas in Communications.

A Framework for Automatic Generation of Configuration Files for a Custom Hardware/Software RTOS

Jaehwan Lee, Kyeong Keol Ryu, J. Lee, 2002 .

A Case Study of Leveraging High-Throughput Distributed Message Queue System for Many-Task Computing on Hadoop

Soonwook Hwang, Jaehwan Lee, Cao Ngoc Nguyen, 2017, 2017 IEEE 2nd International Workshops on Foundations and Applications of Self* Systems (FAS*W).

A comparison of the RTU hardware RTOS with a hardware/software RTOS

J. Lee, V. Mooney, L. Lindh, 2003, Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003..

Multi-biomarker panel selection on a GPU

David Johnson, Jaehwan John Lee, Jake Yue Chen, 2012, 2012 IEEE International Conference on Electro/Information Technology.

An Efficient Approach to Triple Search and Join of HDT Processing Using GPU

YoonKyung Kim, YoonJoon Lee, JaeHwan Lee, 2015, DBKDA 2015.

Empirical Performance Evaluation of Communication Libraries for Multi-GPU based Distributed Deep Learning in a Container Environment

Hyeonseong Choi, Youngrang Kim, Yoonhee Kim, 2021, KSII Trans. Internet Inf. Syst..

Empirical Performance Analysis of Collective Communication for Distributed Deep Learning in a Many-Core CPU Environment

Jaehwan Lee, Junghoon Woo, Hyeonseong Choi, 2020, Applied Sciences.

Efficient Use of GPU Memory for Large-Scale Deep Learning Model Training

J. Lee, Hyeonseong Choi, 2021, Applied Sciences.

Particle Swarm Optimization on a GPU

David Johnson, Mikhail Rabinovich, Jaehwan John Lee, 2012, 2012 IEEE International Conference on Electro/Information Technology.

A Novel Multicontext Coarse-Grained Reconfigurable Architecture (CGRA) For Accelerating Column-Oriented Databases

Pranav Vaidya, Jaehwan John Lee, J. Lee, 2011, TRETS.

Multiprocessor simulation using communicating sequential processes

Pranav Vaidya, Jaehwan John Lee, J. Lee, 2008, Int. J. Comput. Aided Eng. Technol..

Optimization Techniques for a Distributed In-Memory Computing Platform by Leveraging SSD

J. Lee, Jaehyung Lee, Jik-Soo Kim, 2021, Applied Sciences.

Hyper-structure mining of frequent patterns in uncertain data streams

Chandima H. Nadungodage, J. Lee, Yi-Cheng Tu, 2013, Knowledge and Information Systems.

Context Generator and Behavior Translator in a Multilayer Architecture for a Modular Development Process of Cyber-Physical Robot Systems

Seung-Hwan Choi, Jong-Hwan Kim, Jaehwan John Lee, 2014, IEEE Transactions on Industrial Electronics.

Simulation of hybrid computer architectures: simulators, methodologies and recommendations

Pranav Vaidya, Jaehwan John Lee, J. Lee, 2007, VLSI-SoC.

An XML-Based ADL Framework for Automatic Generation of Multithreaded Computer Architecture Simulators

Pranav Vaidya, Christopher Barnes, Jaehwan John Lee, 2009, IEEE Computer Architecture Letters.

A Scalable FPGA Vehicle Monitoring and Classification Architecture

Eliza Yingzi Du, J. Lee, E. Du, 2022 .

Decentralized dynamic scheduling across heterogeneous multi-core desktop grids

Alan Sussman, Jaehwan Lee, Peter J. Keleher, 2010, 2010 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum (IPDPSW).

Characterization of TPC-H queries for a column-oriented database on a dual-core amd athlon processor

Pranav Vaidya, Jaehwan John Lee, J. Lee, 2008, CIKM '08.

Hardware/software partitioning of operating systems: focus on deadlock detection and avoidance

Jaehwan John Lee, Vincent J. Mooney, J. Lee, 2005 .

An o(min(m, n)) parallel deadlock detection algorithm

Jaehwan John Lee, Vincent John Mooney, J. Lee, 2005, TODE.

A Novel {O(n)} Parallel Banker's Algorithm for System-on-a-Chip

Jaehwan John Lee, Vincent John Mooney, J. Lee, 2005, IEEE Transactions on Parallel and Distributed Systems.

A novel deadlock avoidance algorithm and its hardware implementation

Jaehwan Lee, Vincent John Mooney, J. Lee, 2004, International Conference on Hardware/Software Codesign and System Synthesis, 2004. CODES + ISSS 2004..

A Novel Multicontext Coarse-Grained Join Accelerator for Column-Oriented Databases

Pranav Vaidya, Jaehwan John Lee, J. Lee, 2009, ERSA.

Design Space Exploration of Multiprocessor Systems with MultiContext Reconfigurable Co-Processors

Pranav Vaidya, Jaehwan John Lee, J. Lee, 2007, ERSA.

Hardware/Software Deadlock Avoidance for Multiprocessor Multiresource System-on-a-Chip

Jaehwan Lee, J. Lee, 2004 .

A parallel multi-unit resource deadlock detection algorithm with O(log2/min(m, n))) overall run-time complexity

Jaehwan John Lee, Xiang Xiao, J. Lee, 2011, J. Parallel Distributed Comput..

A Novel O(1) Deadlock Detection Methodology for Multiunit Resource Systems and Its Hardware Implementation for System-on-Chip

Jaehwan John Lee, Xiang Xiao, J. Lee, 2008, IEEE Transactions on Parallel and Distributed Systems.

A True O(1) Parallel Deadlock Detection Algorithm for Single-Unit Resource Systems and Its Hardware Implementation

Jaehwan John Lee, Xiang Xiao, J. Lee, 2010, IEEE Transactions on Parallel and Distributed Systems.