D. Marr

Hyper-Threading Technology Architecture and MIcroarchitecture

D. Marr, D. Marr, 2002 .

Hyper-threading Technology Architecture and Microarchitecture 4 Pre-silicon Validation of Hyper-threading Technology 16 Speculative Precomputation: Exploring the Use of Multithreading for Latency Tools 22 Intel ® Openmp C++/fortran Compiler for Hyper-threading Technology: Implementation and Performa

David A. Koufaty, D. Marr, G. Hinton, 2002 .

Increasing the instruction fetch rate via multiple branch prediction and a branch address cache

Yale N. Patt, Deborah T. Marr, Tse-Yu Yeh, 1993, ICS '93.

Hyper-threading technology architecture and microarchitecture : a hyperhtext history

D. T. Marr, D. Marr, 2002 .

Hyper-Threading Technology in the NetburstTM Microarchitecture

Debbie Marr, D. Marr, 2013 .

Multiprocessor validation of the Pentium Pro microprocessor

Shreekant S. Thakkar, Deborah T. Marr, Richard Zucker, 1996, COMPCON '96. Technologies for the Information Superhighway Digest of Papers.

The microarchitecture of the intel pentium 4 processor on 90nm technology

Philippe Roussel, Ronak Singhal, Joseph Hawkins, 2004 .

Author retrospective for increasing the instruction fetch rate via multiple branch prediction and a branch address cache

Yale N. Patt, Tse-Yu Yeh, Deborah T. Marr, 2014, ICS 25th Anniversary.

Increasing the instruction fetch rate via multiple branch prediction and a branch address cache

Yale N. Patt, Tse-Yu Yeh, Deborah T. Marr, 1993, ICS '93.

Hyperthreading Technology in the Netburst Microarchitecture

David A. Koufaty, Deborah T. Marr, David Koufaty, 2003, IEEE Micro.

Microarchitecture Choices and Tradeoffs for Maximizing Processing Efficiency

Deborah T. Marr, Trever N. Mudge, D. Marr, 2008 .