C.K. Yang

A 32nm CMOS Low Power SoC Platform Technology for Foundry Applications with Functional High Density SRAM

Shien-Yang Wu, M. Chiang, J. Liaw, 2007, 2007 IEEE International Electron Devices Meeting.

A highly manufacturable 28nm CMOS low power platform technology with fully functional 64Mb SRAM using dual/tripe gate oxide process

C.C. Chen, Shien-Yang Wu, S.Y. Chang, 2006, 2009 Symposium on VLSI Technology.

A semiconductor bio-electrical platform with addressable thermal control circuits for accelerated bioassay development

R. Bashir, C.K. Yang, M. Chen, 2014, 2014 IEEE International Electron Devices Meeting.

High performance dual-gate ISFET with non-ideal effect reduction schemes in a SOI-CMOS bioelectrical SoC

C.K. Yang, C. Hsieh, C.C. Lin, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).