T. Ku

发表

Impact of slurry in Cu CMP (chemical mechanical polishing) on Cu topography of Through Silicon Vias (TSVs), re-distribution layers, and Cu exposure

P. Tzeng, M. Kao, J. Lau, 2011, 2011 IEEE 61st Electronic Components and Technology Conference (ECTC).

Resistance instabilities in a filament-based resistive memory

Heng-Yuan Lee, Pang-Shiu Chen, Ming-Jinn Tsai, 2013, 2013 IEEE International Reliability Physics Symposium (IRPS).

Fine-pitch backside via-last TSV process with optimization on temporary glue and bonding conditions

P. Tzeng, Shang-Chun Chen, Y. Hsin, 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.

RRAM-based 7T1R nonvolatile SRAM with 2x reduction in store energy and 94x reduction in restore energy for frequent-off instant-on applications

T. Ku, Albert Lee, C. Lin, 2015, 2015 Symposium on VLSI Circuits (VLSI Circuits).

Process integration and 3D chip stacking for low cost backside illuminated CMOS image sensor

Chia-Hsin Lee, Ding-Ming Kwai, Ming-Jer Kao, 2015, 2015 International Symposium on VLSI Technology, Systems and Applications.

Performance Comparison of GaN Power Transistors and Investigation on the Device Design Issues

M. Tsai, T. Ku, R. Xuan, 2012 .

Performance Comparison and Design Issue on Different GaN Power Transistor Structures

M. Tsai, T. Ku, Young-Shying Chen, 2012 .

Scaling properties of perpendicular MTJ with dual-CoFeB/MgO interfaces and step-etch structure

T. Ku, Young-Shying Chen, Yung-Hung Wang, 2014, Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA).

Impact of self-complementary resistance switch induced by over-reset energy on the memory reliability of hafnium oxide based resistive random access memory

Frederick T. Chen, T. Wu, Heng-Yuan Lee, 2014 .

Effects of Slurry in Cu Chemical Mechanical Polishing (CMP) of TSVs for 3-D IC Integration

J. H. Lau, Ming-Jer Kao, Tzu-Kun Ku, 2012, IEEE Transactions on Components, Packaging and Manufacturing Technology.

17.5 A 3T1R nonvolatile TCAM using MLC ReRAM with Sub-1ns search time

Meng-Fan Chang, Tien-Fu Chen, Heng-Yuan Lee, 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

ReRAM-based 4T2R nonvolatile TCAM with 7x NVM-stress reduction, and 4x improvement in speed-wordlength-capacity for normally-off instant-on filter-based search engines used in big-data processing

Meng-Fan Chang, Tien-Fu Chen, Frederick T. Chen, 2014, 2014 Symposium on VLSI Circuits Digest of Technical Papers.

A High-Speed 7.2-ns Read-Write Random Access 4-Mb Embedded Resistive RAM (ReRAM) Macro Using Process-Variation-Tolerant Current-Mode Read Schemes

Meng-Fan Chang, Heng-Yuan Lee, Yu-Sheng Chen, 2013, IEEE Journal of Solid-State Circuits.

Scaling Properties of Step-Etch Perpendicular Magnetic Tunnel Junction With Dual-CoFeB/MgO Interfaces

Tzu-Kun Ku, Kuei-Hung Shen, Shan-Yi Yang, 2014, IEEE Electron Device Letters.

Sub-14 nm HSQ line patterning by e-beam dose proximity effect correction assisted with designed line CD/pitch split

Frederick T. Chen, Wei-Su Chen, Tzu-Kun Ku, 2013, Advanced Lithography.

Back-hopping phenomenon in perpendicular mangetic tunnel junctions

Tzu-Kun Ku, Kuei-Hung Shen, Shan-Yi Yang, 2015, 2015 International Symposium on VLSI Technology, Systems and Applications.

Fully 3-D symmetrical TSV monolithic transformer for RFIC

Shawn S. H. Hsu, S. S. Sheu, C. S. Lin, 2015, 2015 IEEE 65th Electronic Components and Technology Conference (ECTC).

A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability

Heng-Yuan Lee, Frederick T. Chen, Ming-Jinn Tsai, 2011, 2011 IEEE International Solid-State Circuits Conference.

Process integration of 3D Si interposer with double-sided active chip attachments

John H. Lau, Ming-Jer Kao, Tzu-Kun Ku, 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.

Electrical characteristics of bumpless interconnects for through silicon via (TSV) and Wafer-On-Wafer (WOW) integration

P. Tzeng, T. Ohba, T. Ku, 2016, 2016 International Conference on Electronics Packaging (ICEP).

Redistribution Layers (RDLs) for 2.5D/3D IC Integration

John H. Lau, P. Tzeng, M. Kao, 2013 .

Feasibility Study of a 3D IC Integration System-in-Packaging (SiP) from a 300mm Multi-Project Wafer (MPW)

Sheng-Tsai Wu, John H. Lau, T.-H. Chen, 2011 .

Oxide Liner, Barrier and Seed Layers, and Cu-Plating of Blind Through Silicon Vias (TSVs) on 300mm Wafers for 3D IC Integration

John H. Lau, Ming-Jer Kao, Tzu-Kun Ku, 2011 .

Electrical characterization of through silicon vias (TSVs) with an on chip bus driver for 3D IC integration

J. H. Lau, M. J. Kao, S. S. Sheu, 2012, 2012 IEEE 62nd Electronic Components and Technology Conference.

Electrical testing of blind Through-Silicon Via (TSV) for 3D IC integration

P. Tzeng, M. Kao, W. Lo, 2012, 2012 IEEE 62nd Electronic Components and Technology Conference.

Design, fabrication, and calibration of stress sensors embedded in a TSV interposer in a 300mm wafer

Sheng-Tsai Wu, Heng-Chieh Chien, J. H. Lau, 2012, 2012 IEEE 62nd Electronic Components and Technology Conference.

Wafer Bumping and Characterizations of Fine-Pitch Lead-Free Solder Microbumps on 12" (300mm) wafer for 3D IC Integration

J. H. Lau, M. Brillhart, Li Li, 2011 .

Read circuits for resistive memory (ReRAM) and memristor-based nonvolatile Logics

Meng-Fan Chang, Jia-Min Shieh, Albert Lee, 2015, The 20th Asia and South Pacific Design Automation Conference.