I. Markov

发表

Improved algorithms for hypergraph bipartitioning

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 2000, ASP-DAC '00.

Constant-optimized quantum circuits for modular multiplication and exponentiation pdf

Igor L. Markov, Mehdi Saeedi, I. Markov, 2012, Quantum Inf. Comput..

Analytical minimization of half-perimeter wirelength

A. Kennings, I. Markov, 2000, ASP-DAC '00.

Solving difficult instances of Boolean satisfiability in the presence of symmetry

Igor L. Markov, Karem A. Sakallah, Fadi A. Aloul, 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Generic ILP versus specialized 0-1 ILP: an update

K. Sakallah, F. Aloul, I. Markov, 2002, ICCAD 2002.

Energy-Efficient Abundant-Data Computing: The N3XT 1,000x

Kunle Olukotun, Franz Franchetti, Jan M. Rabaey, 2015, Computer.

Faster Schrödinger-style simulation of quantum circuits

I. Markov, Aneeqa Fatima, 2020, 2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA).

On wirelength estimations for row-based placement

Andrew B. Kahng, Igor L. Markov, Alex Zelikovsky, 1998, ISPD '98.

Smoothening Max-terms and Analytical Minimization of Half-Perimeter Wirelength

Igor L. Markov, Andrew A. Kennings, A. Kennings, 2022 .

Progress and Challenges in VLSI Placement Research Special Session Paper

I. Markov, Jin Hu, Myung-Chul Kim, 2012 .

MINCE: A Static Global Variable-Ordering for SAT and BDD

K. Sakallah, F. Aloul, I. Markov, 2001 .

Evaluating Circuit Reliability Under Probabilistic Gate-Level Fault Models

J. Hayes, I. Markov, K. N. Patel, 2003 .

Gate-level simulation of quantum circuits

George F. Viamontes, J. Hayes, I. Markov, 2002, Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003..

Fault testing for reversible circuits

J. Hayes, I. Markov, K. N. Patel, 2003, Proceedings. 21st VLSI Test Symposium, 2003..

Hypergraph partitioning with fixed vertices

A. Kahng, A. Caldwell, I. Markov, 1999, Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361).

Partitioning-based Methods for VLSI Placement

I. Markov, J. A. Roy, 2022 .

Scalable Algorithms Enabled by Problem Structure

K. Sakallah, I. Markov, 2001 .

Designing Chips that Protect Themselves

I. Markov, Farinaz Koushnafar, 2010 .

S Is Quantum Search Practical? Q U a N T U M C O M P U T I N G

J. Hayes, I. Markov, 2005 .

When are Multiple Gate Errors Significant in Logic Circuits ?

J. Hayes, I. Markov, Smita Krishnaswamy, 2006 .

Fast Test Simulation via Distributed Computing

J. Hayes, I. Markov, Kai-Hui Chang, 2006 .

Solving difficult SAT instances in the presence of symmetry

K. Sakallah, F. Aloul, I. Markov, 2002, Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324).

Approximating Decision Diagrams for Quantum Circuit Simulation

R. Kueng, R. Wille, I. Markov, 2022 .

Optimal End-Case Partitioners and Placers for Standard-Cell Layout

A. Kahng, I. Markov, E. Caldwell, 1999 .

The FMSAT Satis ability Solver : Hypergraph Partitioning meets Boolean Satis ability

I. Markov, A. Ramani, 2022 .

RUMBLE: An Incremental Timing-Driven Physical-Synthesis Optimization Algorithm

Igor L. Markov, Gi-Joon Nam, Charles J. Alpert, 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

High-performance Energy Minimization with Applications to Adiabatic Quantum Computing pdf

Igor L. Markov, Héctor J. García, I. Markov, 2009, ArXiv.

Analytical Placement of Hypergraphs | I

A. Kennings, I. Markov, 1999 .

Quantum circuits for incompletely specified two-qubit operators

Igor L. Markov, Vivek V. Shende, I. Markov, 2004, Quantum Inf. Comput..

AnSER : A Lightweight Reliability Evaluator for use in Logic Synthesis

Igor L. Markov, Smita Krishnaswamy, John P. Hayes, 2022 .

Fast Simulation and Equivalence Checking Using OAGear

V. Bertacco, I. Markov, Kai-Hui Chang, 2022 .

Synthesis with External Don ’ t-Cares Using Shannon Entropy and Craig Interpolation

V. Bertacco, A. Mishchenko, I. Markov, 2008 .

Generic Circuit Simulation Techniques

John P. Hayes, Igor L. Markov, George F. Viamontes, 2009 .

The N3XT Approach to Energy-Efficient Abundant-Data Computing

Mary Wootters, Subhasish Mitra, Gage Hills, 2019, Proceedings of the IEEE.

Checking Equivalence of States and Circuits

John P. Hayes, Igor L. Markov, George F. Viamontes, 2009 .

On whitespace and stability in mixed-size placement and physical synthesis

Igor L. Markov, Paul G. Villarrubia, Saurabh N. Adya, 2003, ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486).

To appear in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems

I. Markov, J. A. Roy, D. Papa, 2022 .

Improved algorithms for hypergraph bipartitioning

A. Kahng, A. Caldwell, I. Markov, 2000, Proceedings 2000. Design Automation Conference. (IEEE Cat. No.00CH37106).

Faster minimization of linear wirelength for global placement

Dennis J.-H. Huang, T. Chan, P. Mulet, 1997, ISPD.

Hypergraph partitioning for VLSI CAD: methodology for heuristic development, experimentation and reporting

A. Kahng, A. Kennings, A. Caldwell, 1999, Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361).

Symmetry-Based Rewiring

Igor L. Markov, Valeria Bertacco, Kai-hui Chang, 2009 .

Arbitrary two-qubit computation in 23 elementary gates

I. Markov, S. Bullock, 2002, DAC 2003.

Synthesis of quantum-logic circuits

I. Markov, S. Bullock, V. Shende, 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Looper: An End-to-End ML Platform for Product Decisions

E. Bakshy, I. Markov, Shaun Singh, 2021, KDD.

Simulating Quantum Computation by Contracting Tensor Networks

Yaoyun Shi, I. Markov, 2005, SIAM J. Comput..

Arbitrary two-qubit computation in 23 elementary gates

I. Markov, S. Bullock, 2002, DAC 2003.

A ug 2 00 3 Asymptotically Optimal Circuits for Arbitrary n-qubit Diagonal Computations

I. Markov, S. Bullock, 2022 .

FPGA Synthesis and CAD for Reconfigurable Systems

Luca Benini, Stephen A. Edwards, Yunheung Paek, 2009 .

Recognizing small-circuit structure in two-qubit operators

I. Markov, S. Bullock, V. Shende, 2003, quant-ph/0308045.

Quantum circuits for incompletely specified two-qubit operators

I. Markov, V. Shende, 2004, Quantum Inf. Comput..

Improving QuIDD-based Simulation

John P. Hayes, Igor L. Markov, George F. Viamontes, 2009 .

Counterexample-Guided Error-Repair Framework

Igor L. Markov, Valeria Bertacco, Kai-hui Chang, 2009 .

Finding Bugs and Repairing Circuits

Igor L. Markov, Valeria Bertacco, Kai-hui Chang, 2009 .

Special Case: Simulating Stabilizer Circuits

John P. Hayes, Igor L. Markov, George F. Viamontes, 2009 .

Methodologies for Spare-Cell Insertion

Igor L. Markov, Valeria Bertacco, Kai-hui Chang, 2009 .

Incremental Verification for Physical Synthesis

Igor L. Markov, Valeria Bertacco, Kai-hui Chang, 2009 .

Current Landscape in Design and Verification

Igor L. Markov, Valeria Bertacco, Kai-hui Chang, 2009 .

Is quantum search practical?

George F. Viamontes, J. Hayes, I. Markov, 2004, Computing in Science & Engineering.

Circuit Placement

Igor L. Markov, Andrew A. Kennings, A. Kennings, 2008, Encyclopedia of Algorithms.

Gate Modeling and Circuit Simulation

John P. Hayes, Igor L. Markov, George F. Viamontes, 2009 .

Special issue on System-Level Interconnect Prediction

Igor L. Markov, Dirk Stroobandt, Louis Scheffer, 2007, Integr..

RTL to GDSII, or Synthesis, Place, and Route

Luciano Lavagno, Igor L. Markov, Grant Martin, 2016 .

Functional Error Diagnosis and Correction

Igor L. Markov, Valeria Bertacco, Kai-hui Chang, 2009 .

State-Vector Simulation with Decision Diagrams

John P. Hayes, Igor L. Markov, George F. Viamontes, 2009 .

Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology

Luciano Lavagno, Igor L. Markov, Grant Martin, 2016 .

The Sixth International Workshop on System-Level Interconnect Prediction (SLIP 2004), Paris, France, February 14-15, 2004, Proceedings

Igor L. Markov, Louis K. Scheffer, I. Markov, 2004, SLIP.

Detecting Qubit-coupling Faults in Ion-trap Quantum Computers pdf

Igor L. Markov, Andrii O. Maksymov, Jason Nguyen, 2021, 2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA).

International Workshop on System Level Interconnect Prediction, SLIP: Foreword

Igor L. Markov, I. Markov, 2005 .

Signature-Based Resynthesis Techniques

Igor L. Markov, Valeria Bertacco, Kai-hui Chang, 2009 .

Circuit Placement

Igor L. Markov, Andrew A. Kennings, A. Kennings, 2008, Encyclopedia of Algorithms.

Electronic Design Automation for IC System Design, Verification, and Testing

Luciano Lavagno, Igor L. Markov, Grant Martin, 2016 .

Circuit Design and Verification Methodologies

Igor L. Markov, Valeria Bertacco, Kai-hui Chang, 2009 .

Analog and Mixed-Signal Design

Luciano Lavagno, Igor L. Markov, Grant Martin, 2016 .

Bug Trace Minimization

Igor L. Markov, Valeria Bertacco, Kai-hui Chang, 2009 .

Quantum Circuits for GCD Computation with $O(n \log n)$ Depth and O(n) Ancillae pdf

Igor L. Markov, Mehdi Saeedi, I. Markov, 2013, ArXiv.

Partitioning-Based Methods

Jarrod A. Roy, Igor L. Markov, I. Markov, 2008, Handbook of Algorithms for Physical Design Automation.

Post-Silicon Debugging and Layout Repair

Igor L. Markov, Valeria Bertacco, Kai-hui Chang, 2009 .

The Seventh International Workshop on System-Level Interconnect Prediction (SLIP 2005), San Francisco, CA, USA, April 2-3, 2005, Proceedings

Igor L. Markov, Michael D. Hutton, I. Markov, 2005, SLIP.

Technology Computer-Aided Design

Luciano Lavagno, Igor L. Markov, Grant Martin, 2016 .

System-Level Design

Luciano Lavagno, Igor L. Markov, Grant Martin, 2016 .

FEATURE Q

J. Hayes, I. Markov, G. Viamontes, 2005 .

Approximating Decision Diagrams for Quantum Circuit Simulation

R. Kueng, R. Wille, I. Markov, 2022, ACM Transactions on Quantum Computing.

A pr 2 00 4 Is Quantum Search Practical ?

J. Hayes, I. Markov, G. Viamontes, 2022 .

On the CNOT-cost of TOFFOLI gates

Igor L. Markov, Vivek V. Shende, I. Markov, 2008, Quantum Inf. Comput..

Analytical Placement of Hypergraphs | I

A. Kennings, I. Markov, I. Markov, 1999 .

Limits on fundamental limits to computation

Igor L. Markov, I. Markov, 2014, Nature.

Faster minimization of linear wirelength for global placement

Andrew B. Kahng, Igor L. Markov, Tony F. Chan, 1997, ISPD '97.

Synthesis of reversible logic circuits

John P. Hayes, Igor L. Markov, Vivek V. Shende, 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

As Accurate as Needed, as Efficient as Possible: Approximations in DD-based Quantum Circuit Simulation

Robert Wille, Igor L. Markov, Stefan Hillmich, 2020, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Just Like the Real Thing: Fast Weak Simulation of Quantum Computation

Robert Wille, Igor L. Markov, Stefan Hillmich, 2020, 2020 57th ACM/IEEE Design Automation Conference (DAC).

Synthesis and optimization of reversible circuits—a survey pdf

Igor L. Markov, Mehdi Saeedi, I. Markov, 2011, CSUR.

Data structures and algorithms for simplifying reversible circuits

John P. Hayes, Igor L. Markov, Vivek V. Shende, 2006, JETC.

Exploiting structure in symmetry detection for CNF

Igor L. Markov, Karem A. Sakallah, Mark H. Liffiton, 2004, Proceedings. 41st Design Automation Conference, 2004..

Minimal universal two-qubit controlled-NOT-based circuits (8 pages)

Igor L. Markov, Stephen S. Bullock, Vivek Shende, 2004 .

A layered software architecture for quantum computing design tools

Alfred V. Aho, Igor L. Markov, Andrew W. Cross, 2006, Computer.

High-performance QuIDD-based simulation of quantum circuits

John P. Hayes, Igor L. Markov, George F. Viamontes, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Fast equivalence-checking for quantum circuits

Igor L. Markov, Shigeru Yamashita, I. Markov, 2009, 2010 IEEE/ACM International Symposium on Nanoscale Architectures.

Quantum Supremacy Is Both Closer and Farther than It Appears pdf

Igor L. Markov, Sergio Boixo, Aneeqa Fatima, 2018, ArXiv.

Checking equivalence of quantum circuits and states

John P. Hayes, Igor L. Markov, George F. Viamontes, 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design.

Graph-based simulation of quantum computation in the density matrix representation

John P. Hayes, Igor L. Markov, George F. Viamontes, 2004, SPIE Defense + Commercial Sensing.

Faster Schrödinger-style simulation of quantum circuits pdf

Igor L. Markov, Aneeqa Fatima, I. Markov, 2020, 2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA).

Quantum Circuit Simulation

John P. Hayes, Igor L. Markov, George F. Viamontes, 2009 .

Approximation of Quantum States Using Decision Diagrams

Robert Wille, Igor L. Markov, Alwin Zulehner, 2020, 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC).

Scalable End-to-End ML Platforms: from AutoML to Self-serve

I. Markov, Mia Garrard, Tanvi Gupta, 2023, ArXiv.

Hybrid Techniques for Optimizing Complex Systems

John P. Hayes, Igor L. Markov, J. Hayes, 2009 .

Quantum Approaches to Logic Circuit Synthesis and Testing

John P. Hayes, Igor L. Markov, J. Hayes, 2006 .

Efficient Synthesis of Linear Reversible Circuits

J. Hayes, I. Markov, K. N. Patel, 2003, quant-ph/0302002.

Faster Quantum Number Factoring via Circuit Synthesis pdf

Igor L. Markov, Mehdi Saeedi, I. Markov, 2013, ArXiv.

DetectingQubit-coupling Faults in Ion-trapQuantum Computers

I. Markov, Y. Nam, A. Maksymov, 2021 .

Breaking instance-independent symmetries in exact graph coloring

Igor L. Markov, Karem A. Sakallah, Fadi A. Aloul, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Design and implementation of move-based heuristics for VLSI hypergraph partitioning

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 2000, JEAL.

Design for Robustness

John P. Hayes, Igor L. Markov, Smita Krishnaswamy, 2013 .

On whitespace and stability in physical synthesis

Igor L. Markov, Paul G. Villarrubia, Saurabh N. Adya, 2006, Integr..

Fault testing for reversible circuits

John P. Hayes, Igor L. Markov, Ketan N. Patel, 2003, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Constraint-based watermarking techniques for design IP protection

Miodrag Potkonjak, Andrew B. Kahng, Igor L. Markov, 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Progress and Challenges in VLSI Placement Research

Jin Hu, Igor L. Markov, Myung-Chul Kim, 2012, Proceedings of the IEEE.

Taming the complexity of coordinated place and route

Jin Hu, Igor L. Markov, Myung-Chul Kim, 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).

Dynamic symmetry-breaking for Boolean satisfiability

Igor L. Markov, Karem A. Sakallah, Fadi A. Aloul, 2009, Annals of Mathematics and Artificial Intelligence.

Efficient symmetry breaking for Boolean satisfiability

Igor L. Markov, Karem A. Sakallah, Fadi A. Aloul, 2003, IEEE Transactions on Computers.

AMUSE: a minimally-unsatisfiable subformula extractor

Igor L. Markov, Karem A. Sakallah, Yoonna Oh, 2004, Proceedings. 41st Design Automation Conference, 2004..

EPIC: Ending Piracy of Integrated Circuits

Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov, 2008, 2008 Design, Automation and Test in Europe.

Robust IP watermarking methodologies for physical design

Miodrag Potkonjak, Andrew B. Kahng, Igor L. Markov, 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

Smaller two-qubit circuits for quantum communication and computation

Igor L. Markov, Vivek V. Shende, Stephen S. Bullock, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Tracking Uncertainty with Probabilistic Logic Circuit Testing

John P. Hayes, Igor L. Markov, Smita Krishnaswamy, 2007, IEEE Design & Test of Computers.

Ending Piracy of Integrated Circuits

Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov, 2010, Computer.

An arbitrary twoqubit computation In 23 elementary gates or less

Igor L. Markov, Stephen S. Bullock, I. Markov, 2003, DAC.

Extended abstract: Circuit CAD tools as a security threat

Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov, 2008, 2008 IEEE International Workshop on Hardware-Oriented Security and Trust.

Minimal Universal Two-qubit Quantum Circuits

Igor L. Markov, Vivek V. Shende, Stephen S. Bullock, 2003, quant-ph/0308033.

Probabilistic transfer matrices in symbolic reliability analysis of logic circuits

John P. Hayes, Igor L. Markov, George F. Viamontes, 2008, TODE.

Assembling 2D blocks into 3D chips

Igor L. Markov, Jens Lienig, Johann Knechtel, 2011, ISPD '11.

Generic ILP versus specialized 0-1 ILP: an update

K. Sakallah, F. Aloul, I. Markov, 2002, IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002..

High-Performance Routing at the Nanometer Scale

Jarrod A. Roy, I. Markov, J. A. Roy, 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Toward a Software Architecture for Quantum Computing Design Tools

Alfred V. Aho, Igor L. Markov, Isaac L. Chuang, 2004 .

Ever more optimized simulations of fermionic systems on a quantum computer

I. Markov, Y. Nam, Ming Li, 2023, 2023 60th ACM/IEEE Design Automation Conference (DAC).

Optimal synthesis of linear reversible circuits

John P. Hayes, Igor L. Markov, Ketan N. Patel, 2008, Quantum Inf. Comput..

Asymptotically optimal circuits for arbitrary n-qubit diagonal comutations

Igor L. Markov, Stephen S. Bullock, I. Markov, 2004, Quantum Inf. Comput..

Hypergraph Partitioning and Clustering

Igor L. Markov, David A. Papa, I. Markov, 2007, Handbook of Approximation Algorithms and Metaheuristics.

The False Dawn: Reevaluating Google's Reinforcement Learning for Chip Macro Placement

I. Markov, 2023, ArXiv.

The coming of age of (academic) global routing

Jarrod A. Roy, Igor L. Markov, Michael D. Moffitt, 2008, ISPD '08.

Capo: robust and scalable open-source min-cut floorplacer

Jarrod A. Roy, Igor L. Markov, Saurabh N. Adya, 2005, ISPD '05.

Progress and challenges in VLSI placement research

Jin Hu, Igor L. Markov, Myung-Chul Kim, 2015, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

SafeResynth: A new technique for physical synthesis

Igor L. Markov, Kai-Hui Chang, Valeria Bertacco, 2008, Integr..

Optimizing Nonmonotonic Interconnect Using Functional Simulation and Logic Restructuring

Igor L. Markov, Valeria Bertacco, Stephen M. Plaza, 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

ECO-system: Embracing the Change in Placement

Jarrod A. Roy, Igor L. Markov, I. Markov, 2007, 2007 Asia and South Pacific Design Automation Conference.

Safe Delay Optimization for Physical Synthesis

Igor L. Markov, Kai-Hui Chang, Valeria Bertacco, 2007, 2007 Asia and South Pacific Design Automation Conference.

Capo: Congestion-Driven Placement for Standard-cell and RTL Netlists with Incremental Capability

Jarrod A. Roy, Igor L. Markov, David A. Papa, 2007, Modern Circuit Placement.

Keeping Physical Synthesis Safe and Sound

Igor L. Markov, Valeria Bertacco, Kai-hui Chang, 2022 .

On whitespace and stability in mixed-size placement and physical synthesis

Saurabh N. Adya, I. Markov, P. Villarrubia, 2003, ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486).

Optimal partitioners and end-case placers for standard-cell layout

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 1999, ISPD '99.

Fixed-outline floorplanning: enabling hierarchical design

Igor L. Markov, Saurabh N. Adya, I. Markov, 2003, IEEE Trans. Very Large Scale Integr. Syst..

Accurate reliability evaluation and enhancement via probabilistic transfer matrices

John P. Hayes, Igor L. Markov, George F. Viamontes, 2005, Design, Automation and Test in Europe.

On bottleneck analysis in stochastic stream processing

Igor L. Markov, Raj Rao Nadakuditi, I. Markov, 2013, TODE.

On the costs and benefits of stochasticity in stream processing

Igor L. Markov, Raj Rao Nadakuditi, I. Markov, 2010, Design Automation Conference.

Simulation of Quantum Circuits via Stabilizer Frames

Igor L. Markov, Héctor J. García, I. Markov, 2015, IEEE Transactions on Computers.

A review of "Memcomputing NP-complete problems in polynomial time using polynomial resources" (arXiv: 1411.4798) pdf

Igor L. Markov, I. Markov, 2014, ArXiv.

On the geometry of stabilizer states

Igor L. Markov, Andrew W. Cross, Héctor J. García, 2014, Quantum Inf. Comput..

Hybrid Techniques for Quantum Circuit Simulation

John P. Hayes, Igor L. Markov, J. Hayes, 2014 .

Impact of Future Technologies on Architecture

Trevor N. Mudge, Igor L. Markov, Derek Chiou, 2016, IEEE Micro.

A Practical Top-down Approach to Quantum Circuit Synthesis

Igor L. Markov, Stephen S. Bullock, Vivek Shende, 2004 .

Physical Synthesis with Clock-Network Optimization for Large Systems on Chips

Igor L. Markov, Natarajan Viswanathan, Gi-Joon Nam, 2011, IEEE Micro.

Solving difficult SAT instances in the presence of symmetry

Igor L. Markov, Karem A. Sakallah, Fadi A. Aloul, 2002, Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324).

Conflict Anticipation in the Search for Graph Automorphisms

Igor L. Markov, Karem A. Sakallah, Hadi Katebi, 2012, LPAR.

Bit-efficient Numerical Aggregation and Stronger Privacy for Trust in Federated Analytics pdf

Graham Cormode, Igor L. Markov, Graham Cormode, 2021, ArXiv.

On legalization of row-based placements

Andrew B. Kahng, Igor L. Markov, Sherief Reda, 2004, GLSVLSI '04.

Analytical minimization of half-perimeter wirelength

Igor L. Markov, Andrew A. Kennings, A. Kennings, 2000, Proceedings 2000. Design Automation Conference. (IEEE Cat. No.00CH37106).

Design and Implementation of the Fiduccia-Mattheyses Heuristic for VLSI Netlist Partitioning

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 1999, ALENEX.

Relaxed partitioning balance constraints in top-down placement

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 1998, Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372).

Analytical Engines are Unnecessary in Top-down Partitioning-based Placement

Andrew B. Kahng, Igor L. Markov, Tony F. Chan, 1999, VLSI Design.

Iterative Partitioning with Varying Node Weights

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 2000, VLSI Design.

VLSI Physical Design - From Graph Partitioning to Timing Closure

Igor L. Markov, Jens Lienig, Andrew B. Kahng, 2011 .

Sensitivity-guided metaheuristics for accurate discrete gate sizing

Jin Hu, Andrew B. Kahng, Igor L. Markov, 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

The False Dawn: Reevaluating Google's Reinforcement Learning for Chip Macro Placement

I. Markov, 2023, ArXiv.

Design, Analysis and Test of Logic Circuits Under Uncertainty

John P. Hayes, Igor L. Markov, Smita Krishnaswamy, 2012, Lecture Notes in Electrical Engineering.

Efficient Inner-product Algorithm for Stabilizer States pdf

Igor L. Markov, Andrew W. Cross, Héctor J. García, 2012, ArXiv.

SimPL: An Effective Placement Algorithm

Dongjin Lee, Igor L. Markov, Myung-Chul Kim, 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Min-cut floorplacement

Jarrod A. Roy, Igor L. Markov, Saurabh N. Adya, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Fixed-outline floorplanning through better local search

Igor L. Markov, Saurabh N. Adya, I. Markov, 2001, Proceedings 2001 IEEE International Conference on Computer Design: VLSI in Computers and Processors. ICCD 2001.

ComPLx: A competitive primal-dual Lagrange optimization for global placement

Igor L. Markov, Myung-Chul Kim, I. Markov, 2012, DAC Design Automation Conference 2012.

MAPLE: multilevel adaptive placement for mixed-size designs

Igor L. Markov, Shyam Ramji, Natarajan Viswanathan, 2012, ISPD '12.

Completing high-quality global routes

Jin Hu, Jarrod A. Roy, Igor L. Markov, 2010, ISPD '10.

Sidewinder: a scalable ILP-based router

Jin Hu, Jarrod A. Roy, Igor L. Markov, 2008, SLIP '08.

High-performance routing at the nanometer scale

Jarrod A. Roy, I. Markov, J. A. Roy, 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design.

Toward CAD-IP reuse: a web bookshelf of fundamental algorithms

Igor L. Markov, Andrew E. Caldwell, A. Caldwell, 2002, IEEE Design & Test of Computers.

Optimal die placement for interposer-based 3D ICs

Igor L. Markov, Jens Lienig, Sergii Osmolovskyi, 2018, 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC).

On the role of timing masking in reliable logic circuit design

John P. Hayes, Igor L. Markov, Smita Krishnaswamy, 2008, 2008 45th ACM/IEEE Design Automation Conference.

Watermarking techniques for intellectual property protection

Miodrag Potkonjak, Andrew B. Kahng, Igor L. Markov, 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

Solving the Third-Shift Problem in IC Piracy With Test-Aware Logic Locking

Igor L. Markov, Stephen M. Plaza, I. Markov, 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Efficient Optimization by Modifying the Objective Function: Applications to Timing-Driven

Andrew B. Kahng, Igor L. Markov, R. Baldick, 2001 .

Function smoothing with applications to VLSI layout

Andrew B. Kahng, Igor L. Markov, Andrew A. Kennings, 1999, Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198).

Testing Logic Circuits for Probabilistic Faults

John P. Hayes, Igor L. Markov, Smita Krishnaswamy, 2013 .

On Sub-optimality and Scalability of Logic Synthesis Tools

Jarrod A. Roy, Igor L. Markov, I. Markov, 2003 .

Computing with Probabilistic Transfer Matrices

John P. Hayes, Igor L. Markov, Smita Krishnaswamy, 2013 .

Solving hard instances of floorplacement

Igor L. Markov, Rajat Aggarwal, Venky Ramachandran, 2006, ISPD '06.

Satisfying whitespace requirements in top-down placement

Jarrod A. Roy, Igor L. Markov, David A. Papa, 2006, ISPD '06.

Can recursive bisection alone produce routable, placements?

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 2000, Proceedings 37th Design Automation Conference.

Hypergraph partitioning with fixed vertices [VLSI CAD]

Andrew B. Kahng, Charles J. Alpert, Andrew E. Caldwell, 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Securely Sealing Multi-FPGA Systems

Tim Güneysu, Igor L. Markov, André Weimerskirch, 2012, ARC.

Seeing the Forest and the Trees: Steiner Wirelength Optimization in Placement

Jarrod A. Roy, Igor L. Markov, James F. Lu, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Large-scale Boolean matching

Igor L. Markov, Hadi Katebi, I. Markov, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

Restoring Circuit Structure from SAT Instances

Jarrod A. Roy, Igor L. Markov, Valeria Bertacco, 2004 .

Synthesis of quantum logic circuits

I. Markov, S. Bullock, V. Shende, 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..

A Compressed Breadth-First Search for Satisfiability

Igor L. Markov, DoRon B. Motter, Doron B. Motter, 2002, ALENEX.

MINCE: A Static Global Variable-Ordering Heuristic for SAT Search and BDD Manipulation

Igor L. Markov, Karem A. Sakallah, Fadi A. Aloul, 2004, J. Univers. Comput. Sci..

Minimal Universal Two-Qubit CNOT-based Circuits

Igor L. Markov, Vivek V. Shende, Stephen S. Bullock, 2022 .

Solution and Optimization of Systems of Pseudo-Boolean Constraints

Igor L. Markov, Karem A. Sakallah, Fadi A. Aloul, 2007, IEEE Transactions on Computers.

PBS: A Backtrack-Search Pseudo-Boolean Solver and Optimizer

Igor L. Markov, Karem A. Sakallah, Fadi A. Aloul, 2000 .

Quadratic Placement Revisited

Dennis J.-H. Huang, D.J.-H. Huang, I. Markov, 1997, Proceedings of the 34th Design Automation Conference.

Toward quality EDA tools and tool flows through high-performance computing

Igor L. Markov, Aaron N. Ng, I. Markov, 2005, Sixth international symposium on quality electronic design (isqed'05).

Toward CAD-IP Reuse: The MARCO GSRC Bookshelf of Fundamental CAD Algorithms

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 2002 .

Reversible logic circuit synthesis

John P. Hayes, Igor L. Markov, Vivek V. Shende, 2002, IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002..

Buffer Insertion During Timing-Driven Placement

Igor L. Markov, David A. Papa, I. Markov, 2013 .

Gate Sizing During Timing-Driven Placement

Igor L. Markov, David A. Papa, I. Markov, 2013 .

Practical slicing and non-slicing block-packing without simulated annealing

Igor L. Markov, Hayward H. Chan, H. H. Chan, 2004, GLSVLSI '04.

Assembling 2-D Blocks Into 3-D Chips

I. Markov, J. Lienig, J. Knechtel, 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

FORCE: a fast and easy-to-implement variable-ordering heuristic

Igor L. Markov, Karem A. Sakallah, Fadi A. Aloul, 2003, GLSVLSI '03.

Hierarchical whitespace allocation in top-down placement

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

ECO-System: Embracing the Change in Placement

Jarrod A. Roy, I. Markov, 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Minimal Universal Two-qubit Quantum Circuits

I. Markov, S. Bullock, V. Shende, 2003, quant-ph/0308033.

Summary and Extensions

John P. Hayes, Igor L. Markov, Smita Krishnaswamy, 2013 .

The False Dawn: Reevaluating Google's Reinforcement Learning for Chip Macro Placement

I. Markov, 2023, ArXiv.

Min-max placement for large-scale timing optimization

A. Kahng, S. Mantik, I. Markov, 2002, ISPD '02.

Netlist and System Partitioning

Andrew B. Kahng, Igor L. Markov, Jens Lienig, 2011 .

ClockPUF: Physical Unclonable Functions based on clock networks

Farinaz Koushanfar, Igor L. Markov, Jianmin Li, 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).