Hiroshi Inokawa

发表

A Merged SET-MOSFET Logic for Interface and Multiple-Valued Functions

Hiroshi Inokawa, Akira Fujiwara, Yasuo Takahashi, 2001 .

Electromagnetic testing and image reconstruction with flexible scanning tablets

Takayuki Suzuki, Hiroshi Inokawa, Yoshihiro Nishimura, 2009, Smart Structures and Materials + Nondestructive Evaluation and Health Monitoring.

Angle-Sensitive Detector Based on Silicon-On-Insulator Photodiode Stacked with Surface Plasmon Antenna

Hiroshi Inokawa, Anitharaj Nagarajan, Shusuke Hara, 2020, Sensors.

Full adder operation based on Si nanodot array device

Hiroshi Inokawa, Akira Fujiwara, Yasuo Takahashi, 2009, 2008 IEEE Silicon Nanoelectronics Workshop.

A Single-Electron-Transistor Logic Gate Family for Binary, Multiple-Valued and Mixed-Mode Logic( New System Paradigms for Integrated Electronics)

Hiroshi Inokawa, Yasuo Takahashi, Takafumi Aoki, 2004 .

Binary adders of multigate single-electron transistors: specific design using pass-transistor logic

Hiroshi Inokawa, Yasuo Takahashi, Yukinori Ono, 2002 .

Analysis of RF Reflection Method for MOSFET Electrometer Fabricated by Standard Integrated-Circuit Technology

Hiroshi Inokawa, Hiroaki Satoh, Mitsuru Kawai, 2015 .

Transfer and Detection of Single Electrons Using Metal-Oxide-Semiconductor Field-Effect Transistors

Hiroshi Yamaguchi, Hiroshi Inokawa, Akira Fujiwara, 2007, IEICE Trans. Electron..

Evaluation of multidrug cancer chronotherapy based on cell cycle model under influences of circadian clock

Hiroshi Inokawa, Norihiro Katayama, Mitsuyuki Nakao, 2016, 2016 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC).

Design of a Two-Bit-Per-Cell Content-Addressable Memory Using Single-Electron Transistors

Hiroshi Inokawa, Yasuo Takahashi, Takafumi Aoki, 2007, J. Multiple Valued Log. Soft Comput..

Multifunctional Boolean Logic Using Single-Electron Transistors( New System Paradigms for Integrated Electronics)

Hiroshi Inokawa, Akira Fujiwara, Yasuo Takahashi, 2004 .

Angular selectivity of SOI photodiode with surface plasmon antenna

Hiroshi Inokawa, Anitharaj Nagarajan, Shusuke Hara, 2020, IEICE Electron. Express.

Silicon single-electron devices and their applications

Hiroshi Inokawa, Yasuo Takahashi, A. Fujiwara, 2004 .

Single-Electron Logic Devices

Hiroshi Inokawa, Akira Fujiwara, Yasuo Takahashi, 2017 .

Effect of Arrangement of Input Gates on Logic Switching Characteristics of Nanodot Array Device

Hiroshi Inokawa, Akira Fujiwara, Yasuo Takahashi, 2012, IEICE Trans. Electron..

Gate delay time evaluation structure for deep-submicron CMOS LSIs

Hiroshi Inokawa, Yuichi Kado, K. Nishimura, 1996, Proceedings of International Conference on Microelectronic Test Structures.

Application of bow-tie surface plasmon antenna to silicon on insulator nanowire photodiode for enhanced light absorption

Hiroshi Inokawa, Hiroaki Satoh, Yash Sharma, 2018, IEICE Electron. Express.

Direct Measurement of Capacitance Parameters in Nanometer-Scale MOSFETs

Hiroshi Inokawa, Hiroaki Satoh, Akira Fujiwara, 2008 .

Experimental and simulation studies of single-electron-transistor-based multiple-valued logic

Hiroshi Inokawa, Yasuo Takahashi, 2003, 33rd International Symposium on Multiple-Valued Logic, 2003. Proceedings..

A 0.5-V MTCMOS/SIMOX logic gate

Satoshi Shigematsu, Hiroshi Inokawa, Junzo Yamada, 1997 .

A single-electron-transistor logic gate family and its application - Part I: basic components for binary, multiple-valued and mixed-mode logic

Hiroshi Inokawa, Yasuo Takahashi, Takafumi Aoki, 2004, Proceedings. 34th International Symposium on Multiple-Valued Logic.

A High-Density Ternary Content-Addressable Memory Using Single-Electron Transistors

Hiroshi Inokawa, Yasuo Takahashi, Takafumi Aoki, 2006, 36th International Symposium on Multiple-Valued Logic (ISMVL'06).

A two-bit-per-cell content-addressable memory using single-electron transistors

Hiroshi Inokawa, Yasuo Takahashi, Takafumi Aoki, 2005, 35th International Symposium on Multiple-Valued Logic (ISMVL'05).

Seat assembly for vehicle

Hiroshi Inokawa, Koichi Sugioka, Kiyotaka Fujihara, 2004 .

Time-controlled single-electron transfer in single-gated asymmetric multiple tunnel junction arrays

Hiroshi Inokawa, Daniel Moraru, Hiroya Ikeda, 2007 .

Plasmonics for sensor applications(Next technology trends,2nd Asian Image Sensors and Imaging Systems Symposium)

Hiroshi Inokawa, Hiroaki Satoh, Atsushi Ono, 2014 .

A single-electron-transistor logic gate family and its application - Part II: design and simulation of a 7-3 parallel counter with linear summation and multiple-valued latch functions

Hiroshi Inokawa, Yasuo Takahashi, Takafumi Aoki, 2004, Proceedings. 34th International Symposium on Multiple-Valued Logic.

A multiple-valued single-electron SRAM by the PADOX process

Hiroshi Inokawa, A. Fujiwara, Y. Takahashi, 2001, 2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443).

Single electron tunneling transistor with tunable barriers using silicon nanowire metal-oxide-semiconductor field-effect transistor

Hiroshi Inokawa, Yasuo Takahashi, Kenji Yamazaki, 2006 .

Silicon single-electron devices

Hiroshi Inokawa, Yasuo Takahashi, Akira Fujiwara, 2002 .

Multilevel memory using single-electron turnstile

Hiroshi Inokawa, Yasuo Takahashi, Akira Fujiwara, 2004 .

Silicon nanodot-array device with multiple gates

Hiroshi Inokawa, Yasuo Takahashi, Kenji Yamazaki, 2008 .

Sub-1/4-/spl mu/m dual-gate CMOS technology using in-situ doped polysilicon for nMOS and pMOS gates

Hiroshi Inokawa, Yukio Okazaki, Satoshi Nakayama, 1995 .

Foundry Metal–Oxide–Semiconductor Field-Effect-Transistor Electrometer for Single-Electron Detection

Hiroshi Inokawa, Nicolas Clement, 2005 .