Seong-ook Jung

发表

High-performance low-power magnetic tunnel junction based non-volatile flip-flop

Seong-Ook Jung, Kyungho Ryu, Seung H. Kang, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

Variation-Aware Figure of Merit for Integrated Circuit in Near-Threshold Region

Seong-Ook Jung, Younghwi Yang, Geoffrey Yeap, 2015, IEEE Transactions on Electron Devices.

STT-MRAM Sensing Circuit With Self-Body Biasing in Deep Submicron Technologies

Seong-Ook Jung, Kyungho Ryu, Seung H. Kang, 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Coupling delay optimization by temporal decorrelation using dual threshold voltage technique

Taewhan Kim, Seong-ook Jung, C. Liu, 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

Self-Referenced Single-Ended Resistance Monitoring Write Termination Scheme for STT-RAM Write Energy Reduction

Seong-Ook Jung, Seung H. Kang, Byungkyu Song, 2021, IEEE Transactions on Circuits and Systems I: Regular Papers.

Non-Volatile Majority Function Logic Using Ferroelectric Memory for Logic in Memory Technology

Seong-ook Jung, Giuk Kim, J. Hwang, 2022, IEEE Electron Device Letters.

An MTJ‐based non‐volatile flip‐flop for high‐performance SoC

Seong-Ook Jung, Kyungho Ryu, Seung H. Kang, 2014, Int. J. Circuit Theory Appl..

A 10T-4MTJ Nonvolatile Ternary CAM Cell for Reliable Search Operation and a Compact Area

Seong-Ook Jung, Seung H. Kang, Taehui Na, 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.

Latch Offset Cancellation Sense Amplifier for Deep Submicrometer STT-RAM

Seong-Ook Jung, Seung H. Kang, Jisu Kim, 2015, IEEE Transactions on Circuits and Systems I: Regular Papers.

Comparative Study of Various Latch-Type Sense Amplifiers

Hanwool Jeong, Seong-Ook Jung, Seung-Han Woo, 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A Novel Sensing Circuit for Deep Submicron Spin Transfer Torque MRAM (STT-MRAM)

Seong-Ook Jung, Kyungho Ryu, Seung H. Kang, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

One-Sided Schmitt-Trigger-Based 9T SRAM Cell for Near-Threshold Operation

Seong-Ook Jung, Keonhee Cho, Tae Woo Oh, 2020, IEEE Transactions on Circuits and Systems I: Regular Papers.

All-Digital ON-Chip Process Sensor Using Ratioed Inverter-Based Ring Oscillator

Seong-Ook Jung, Young-Jae An, Kyungho Ryu, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

GRO‐TDC with gate‐switch‐based delay cell halving resolution limit

Seong-Ook Jung, Dong-Hoon Jung, Jung-Hyun Park, 2017, Int. J. Circuit Theory Appl..

All-Digital Fast-Locking Delay-Locked Loop Using a Cyclic-Locking Loop for DRAM

Dong-Hoon Jung, Seong-Ook Jung, Young-Jae An, 2015, IEEE Transactions on Circuits and Systems II: Express Briefs.

Switching pMOS Sense Amplifier for High-Density Low-Voltage Single-Ended SRAM

Hanwool Jeong, Taewon Kim, Taejoong Song, 2015, IEEE Transactions on Circuits and Systems I: Regular Papers.

A Novel Matchline Scheduling Method for Low-Power and Reliable Search Operation in Cross-Point-Array Nonvolatile Ternary CAM

Seong-Ook Jung, Hyun Kook Park, Hong Keun Ahn, 2020, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Offset-Cancellation Sensing-Circuit-Based Nonvolatile Flip-Flop Operating in Near-Threshold Voltage Region

Seung H. Kang, Byungkyu Song, Seong-Ook Jung, 2019, IEEE Transactions on Circuits and Systems I: Regular Papers.

High-Performance and Area-Efficient Ferroelectric FET-Based Nonvolatile Flip-Flops

Seong-Ook Jung, Tae Woo Oh, Se Keon Kim, 2021, IEEE Access.

Thermal and solar energy harvesting boost converter with time-multiplexing MPPT algorithm

Seong-Ook Jung, Ki-Ryong Kim, Dong-Hoon Jung, 2016, IEICE Electron. Express.

Architecture-Aware Analytical Yield Model for Read Access in Static Random Access Memory

Hanwool Jeong, Seong-Ook Jung, Jisu Kim, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A Wide-Range Static Current-Free Current Mirror-Based LS With Logic Error Detection for Near-Threshold Operation

Taejoong Song, Seong-Ook Jung, Hanwool Jeong, 2021, IEEE Journal of Solid-State Circuits.

An Offset-Canceled Sense Amplifier for DRAMs With Hidden Offset-Cancellation Time and Boosted Internal-Voltage-Difference

Seong-ook Jung, Keonhee Cho, Kiryong Kim, 2023, IEEE Transactions on Circuits and Systems II: Express Briefs.

STT-MRAM Sensing: A Review

Seong-Ook Jung, Seung H. Kang, Taehui Na, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.

0.293-mm2 Fast Transient Response Hysteretic Quasi- $V^{2}$ DC–DC Converter With Area-Efficient Time-Domain-Based Controller in 0.35- $\mu$ m CMOS

Dong-Hoon Jung, Seong-Ook Jung, Sunghwan Joo, 2018, IEEE Journal of Solid-State Circuits.

SRAM Write- and Performance-Assist Cells for Reducing Interconnect Resistance Effects Increased with Technology Scaling

Seong-Ook Jung, Ki-Ryong Kim, Tae Woo Oh, 2021, 2021 Symposium on VLSI Circuits.

A 5 Gb/s Time-Interleaved Voltage-Mode Duobinary Encoding Scheme for 3-D-Stacked IC

Seong-ook Jung, Jongsoo Lee, Kyomin Sohn, 2022, IEEE Journal of Solid-State Circuits.

Single Bit-Line 7T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Performance and Energy in 14 nm FinFET Technology

Hanwool Jeong, Seong-Ook Jung, Joseph Wang, 2016, IEEE Transactions on Circuits and Systems I: Regular Papers.

SRAM Write Assist Circuit Using Cell Supply Voltage Self-Collapse With Bitline Charge Sharing for Near-Threshold Operation

Seong-Ook Jung, Tae Woo Oh, Kiryong Kim, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.

Read-Preferred SRAM Cell With Write-Assist Circuit Using Back-Gate ETSOI Transistors in 22-nm Technology

Hanwool Jeong, Seong-Ook Jung, J. Wang, 2012, IEEE Transactions on Electron Devices.

Power-Gated 9T SRAM Cell for Low-Energy Operation

Hanwool Jeong, Seong-Ook Jung, Juhyun Park, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Single-Ended 9T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Read Performance in 22-nm FinFET Technology

Seong-Ook Jung, Juhyun Park, Joseph Wang, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Differential Read/Write 7T SRAM With Bit-Interleaved Structure for Near-Threshold Operation

Seong-Ook Jung, Tae Woo Oh, Ji Sang Oh, 2021, IEEE Access.

Bitline Charge-Recycling SRAM Write Assist Circuitry for $V_{\mathrm{MIN}}$ Improvement and Energy Saving

Taejoong Song, Seong-Ook Jung, Woojin Rim, 2019, IEEE Journal of Solid-State Circuits.

Offset-Compensated Cross-Coupled PFET Bit-Line Conditioning and Selective Negative Bit-Line Write Assist for High-Density Low-Power SRAM

Hanwool Jeong, Taewon Kim, Taejoong Song, 2015, IEEE Transactions on Circuits and Systems I: Regular Papers.

Design of a 22-nm FinFET-Based SRAM With Read Buffer for Near-Threshold Voltage Operation

Hanwool Jeong, Seong-Ook Jung, Juhyun Park, 2015, IEEE Transactions on Electron Devices.

An Embedded Level-Shifting Dual-Rail SRAM for High-Speed and Low-Power Cache

Taejoong Song, Seong-Ook Jung, Tae Hyun Kim, 2020, IEEE Access.

A 14-nm Low Voltage SRAM with Charge-Recycling and Charge Self-Saving Techniques for Low-Power Applications

Seong-ook Jung, T. Song, Mijung Kim, 2022, 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).

Skew-tolerant high-speed (STHS) domino logic

Sung-Mo Kang, Seong-Ook Jung, Seung-Moon Yoo, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Local Bit-Line SRAM Architecture With Data-Aware Power-Gating Write Assist

Tae Woo Oh, Seong-ook Jung, Keonhee Cho, 2023, IEEE Transactions on Circuits and Systems - II - Express Briefs.

Pre-Charged Local Bit-Line Sharing SRAM Architecture for Near-Threshold Operation

Hanwool Jeong, Seong-Ook Jung, Juhyun Park, 2017, IEEE Transactions on Circuits and Systems I: Regular Papers.

Numerical Estimation of Yield in Sub-100-nm SRAM Design Using Monte Carlo Simulation

Seong-Ook Jung, S. Simon Wong, Hyunwoo Nho, 2008, IEEE Transactions on Circuits and Systems II: Express Briefs.

Slope Interconnect Effort: Gate-Interconnect Interdependent Delay Modeling for Early CMOS Circuit Simulation

Kaushik Roy, Seong-Ook Jung, Myeong-Eun Hwang, 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.

An Energy Efficient Time-Domain Temperature Sensor for Low-Power On-Chip Thermal Management

Dong-Hoon Jung, Seong-Ook Jung, Young-Jae An, 2014, IEEE Sensors Journal.

An Offset-Canceling Triple-Stage Sensing Circuit for Deep Submicrometer STT-RAM

Seong-Ook Jung, Seung H. Kang, Jisu Kim, 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Sensing Margin Enhancement Technique Utilizing Boosted Reference Voltage for Low-Voltage and High-Density DRAM

Suk Min Kim, Byungkyu Song, Seong-Ook Jung, 2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

CNN Acceleration With Hardware-Efficient Dataflow for Super-Resolution

Seong-Ook Jung, Hong Keun Ahn, Sumin Lee, 2020, IEEE Access.

Low power SRAM design for 14 nm GAA Si-nanowire technology

S. K. Manhas, Sudeb Dasgupta, Gaurav Kaushal, 2015, Microelectron. J..

A Magnetic Tunnel Junction Based Zero Standby Leakage Current Retention Flip-Flop

Seong-Ook Jung, Kyungho Ryu, Seung H. Kang, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Thermoelectric Cooling Read for Resolving Read Disturb With Inrush Current Issue in OTS-PRAM

Seong-Ook Jung, Hyun Kook Park, Tae Hoon Choi, 2019, IEEE Transactions on Nanotechnology.

High-Precision and Low-Power Offset Canceling Tri-State Sensing Latch in NAND Flash Memory

Seong-ook Jung, I. Jung, Taeyun Lee, 2023, IEEE Transactions on Circuits and Systems II: Express Briefs.

All-Bit-Line Read Scheme With Locking Bit-Line and Amplifying Sense Node in NAND Flash

Seong-Ook Jung, Jun Ho An, Hyun Kook Park, 2021, IEEE Access.

Incremental Bitline Voltage Sensing Scheme With Half-Adaptive Threshold Reference Scheme in MLC PRAM

Jisu Kim, Junyoung Ko, H. K. Park, 2017, IEEE Transactions on Circuits and Systems I: Regular Papers.

Noise-aware interconnect power optimization in domino logic synthesis

Sung-Mo Kang, Seong-Ook Jung, C. L. Liu, 2003, IEEE Trans. Very Large Scale Integr. Syst..

Low-swing clock domino logic incorporating dual supply and dual threshold voltages

S. Kang, Seong-ook Jung, Ki-Wook Kim, 2002, Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324).

Dual threshold voltage domino logic synthesis for high performance with noise and power constraint

Sung-Mo Kang, Seong-Ook Jung, Ki-Wook Kim, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

Noise-aware power optimization for on-chip interconnect

Sung-Mo Kang, Seong-Ook Jung, C.L. Liu, 2000, ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514).

Parallel dynamic logic (PDL) with speed-enhanced skewed static (SSS) logic

Chulwoo Kim, Sung-Mo Kang, Seong-Ook Jung, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

All-Digital Process-Variation-Calibrated Timing Generator for ATE With 1.95-ps Resolution and Maximum 1.2-GHz Test Rate

Dong-Hoon Jung, Seong-Ook Jung, Kyungho Ryu, 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

High-speed CMOS circuits with parallel dynamic logic and speed-enhanced skewed static logic

Chulwoo Kim, Sung-Mo Kang, Kwang-Hyun Baek, 2002 .