S. Burns

A 500-MHz multi-banked compilable DRAM macro with direct write and programmable pipelining

J.E. Barth, D. Anand, S. Burns, 2004, IEEE Journal of Solid-State Circuits.

Overcoming the challenges of 22-nm node patterning through litho-design co-optimization

Martin Burkhardt, S. Burns, C. Tabery, 2009, Advanced Lithography.

FINFET technology featuring high mobility SiGe channel for 10nm and beyond

D. Liu, P. Oldiges, N. Loubet, 2016, 2016 IEEE Symposium on VLSI Technology.

An SRAM Design in 65nm and 45nm Technology Nodes Featuring Read and Write-Assist Circuits to Expand Operating Voltage

S. Burns, A. Roberts, H. Pilo, 2006, 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers..