Kuo-Hsiang Hsu

A ReRAM-Based Nonvolatile Flip-Flop With Self-Write-Termination Scheme for Frequent-OFF Fast-Wake-Up Nonvolatile Processors

Meng-Fan Chang, Qi Wei, Huazhong Yang, 2017, IEEE Journal of Solid-State Circuits.

A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors

Meng-Fan Chang, Tzu-Hsiang Hsu, Ren-Shuo Liu, 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).

TSV-free FinFET-based Monolithic 3D+-IC with computing-in-memory SRAM cell for intelligent IoT devices

Guo-Wei Huang, Jia-Min Shieh, Chih-Chao Yang, 2017, 2017 IEEE International Electron Devices Meeting (IEDM).

A ReRAM-based single-NVM nonvolatile flip-flop with reduced stress-time and write-power against wide distribution in write-time by using self-write-termination scheme for nonvolatile processors in IoT era

Meng-Fan Chang, Huazhong Yang, Yongpan Liu, 2016, 2016 IEEE International Electron Devices Meeting (IEDM).

A 462GOPs/J RRAM-based nonvolatile intelligent processor for energy harvesting IoE system featuring nonvolatile logics and processing-in-memory

Meng-Fan Chang, Huazhong Yang, Yuan Xie, 2017, 2017 Symposium on VLSI Technology.

Improving FPGA Design with Monolithic 3D Integration Using High Dense Inter-Stack Via

Narayanan Vijaykrishnan, Meng-Fan Chang, Xueqing Li, 2017, 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).