S. Aur

发表

Oxide thickness dependence of inverter delay and device reliability for 0.25 /spl mu/m CMOS technology

R. Chapman, I. Chen, A. Chatterjee, 1993, Proceedings of IEEE International Electron Devices Meeting.

A sub-0.1 /spl mu/m gate length CMOS technology for high performance (1.5 V) and low power (1.0 V)

I. Chen, S. Aur, Q. Hong, 1996, International Electron Devices Meeting. Technical Digest.

A 1.2 V, 0.1 /spl mu/m gate length CMOS technology: design and process issues

M. Rodder, S. Aur, N. Yu, 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

60 nm gate length dual-Vt CMOS for high performance applications

K. Kim, M. Rodder, S. Aur, 2002, 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).

A 0.10 /spl mu/m gate length CMOS technology with 30 /spl Aring/ gate dielectric for 1.0 V-1.5 V applications

I. Chen, D. Rogers, A. Amerasekera, 1997, International Electron Devices Meeting. IEDM Technical Digest.

A scaled 1.8 V, 0.18 /spl mu/m gate length CMOS technology: device design and reliability considerations

I. Chen, M. Rodder, S. Aur, 1995, Proceedings of International Electron Devices Meeting.

CMOS metal replacement gate transistors using tantalum pentoxide gate insulator

G.A. Brown, A. Chatterjee, M. Rodder, 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

Effects of advanced processes on hot carrier reliability

V. McNeil, S. Aur, T. Holloway, 1998, 1998 IEEE International Reliability Physics Symposium Proceedings. 36th Annual (Cat. No.98CH36173).

Atomic structure of amorphous particles produced by spark erosion

S. Aur, A. Berkowitz, T. Egami, 1982 .

IVB-6 hot-carrier reliability of trench transistor

Ping Yang, S. Aur, 1987, IEEE Transactions on Electron Devices.

Hot-Carrier Degradation Effects for DRAM Circuits

C. Duvvury, S. Aur, 1992 .

Antenna device reliability for ULSI processing

A. Amerasekera, S. Aur, S. Rangan, 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

High density plasma etch induced damage to thin gate oxide

S. Aur, S. Krishnan, R. Rajgopal, 1995, Proceedings of International Electron Devices Meeting.

Secondary ion mass spectroscopy characterization of the deuterium sintering process for enhanced-lifetime complementary metal-oxide-semiconductor transistors

K. Hess, S. Aur, J. Lyding, 1998 .

The structure of calcium-aluminium glasses: X-ray diffraction and computer simulation studies

S. Aur, J. Hafner, T. Egami, 1987 .

Local atomic structure of amorphous and crystalline alloys: Computer simulation

S. Aur, T. Egami, 1987 .

Local atomic structure in amorphous Mo50Ni50 by resonance x-ray diffraction using synchrotron radiation

Y. Waseda, S. Aur, H. Chen, 1984 .

Comparative evaluation of gap-fill dielectrics in shallow trench isolation for sub-0.25 /spl mu/m technologies

S. Aur, A. Chatterjee, I. Ali, 1996, International Electron Devices Meeting. Technical Digest.

Utilization of plasma hydrogenation in stacked SRAM's with poly-Si PMOSFET's and bulk-Si NMOSFET's

S. Aur, M. Rodder, M. Rodder, 1991, IEEE Electron Device Letters.

Local structure of amorphous MO50Ni50 determined by anomalous x-ray scattering using synchroton radiation

Y. Waseda, S. Aur, H. Chen, 1983 .

Use of a semiconductor detector in anomalous (resonance) X-ray scattering measurement of local structure of an amorphous alloy

Y. Waseda, S. Aur, H. Chen, 1984 .

Evaluation of the positive biased temperature stress stability in HfSiON gate dielectrics

J. McPherson, S. Aur, P. Nicollian, 2003, 2003 IEEE International Reliability Physics Symposium Proceedings, 2003. 41st Annual..

An enhanced 90nm high performance technology with strong performance improvements from stress and mobility increase through simple process changes

B. Hornung, C. Machala, A. Krishnan, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..

Setting the trap for hot carriers [MOS VLSI]

C. Duvvury, S. Aur, W.R. Hunter, 1995, IEEE Circuits and Devices Magazine.

Circuit hot electron effect simulation

S. Aur, D. Hocevar, S. Aur, 1987, 1987 International Electron Devices Meeting.