Zhonghai Lu

发表

A single-cycle output buffered router with layered switching for Networks-on-Chips

Zhonghai Lu, Minxuan Zhang, Jinwen Li, 2012, Comput. Electr. Eng..

Cluster-based Simulated Annealing for Mapping Cores onto 2D Mesh Networks on Chip

Axel Jantsch, Zhonghai Lu, Lei Xia, 2008, 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems.

Analysis of Worst-Case Delay Bounds for On-Chip Packet-Switching Networks

Wenhua Dou, Zhonghai Lu, Yue Qian, 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A Configurable Hardware Architecture for Runtime Application of Network Calculus

Zhonghai Lu, Xiao Hu, 2020, NPC.

A New Approach For Codec LCD Sub-pixel Encoding and Decoding Based on Machine Vision

Zhonghai Lu, L. Yuanyuan, Jantsch, 2010 .

Flit ejection in on-chip wormhole-switched networks with virtual channels

Zhonghai Lu, A. Jantsch, 2004, Proceedings Norchip Conference, 2004..

Network on Chip Architectures

José Flich Cardo, N. E. Jerger, C. Teuscher, 2008 .

A CORDIC-Based Architecture with Adjustable Precision and Flexible Scalability to Implement Sigmoid and Tanh Functions

Li Li, Zhonghai Lu, Hui Chen, 2020, 2020 IEEE International Symposium on Circuits and Systems (ISCAS).

Opportunistic Competition Overhead Reduction for Expediting Critical Section in NoC Based CMPs

Yuan Yao, Zhonghai Lu, Y. Yao, 2016, 2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA).

Network-on-Chip Assembler Language ( Version 0 . 1 )

Zhonghai Lu, A. Jantsch, 2003 .

Proceedings of the Third Workshop on Cryptography and Security in Computing Systems

Giovanni Agosta, Gerardo Pelosi, Mats Brorsson, 2016, CS2@HiPEAC.

Design and Implementation of Router Supporting for Multicast On-chip

Axel Jantsch, Hengzhu Liu, Zhonghai Lu, 2011 .

Enabling Energy-Efficient Inference for Self-Attention Mechanisms in Neural Networks

Zhonghai Lu, Chang Gao, Qinyu Chen, 2022, 2022 IEEE 4th International Conference on Artificial Intelligence Circuits and Systems (AICAS).

2012 Sixth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), Copenhagen, Denmark, 9-11 May, 2012

Natalie D. Enright Jerger, Hannu Tenhunen, Meikang Qiu, 2012, NOCS.

A Hierarchical Parallel Discrete Gaussian Sampler for Lattice-Based Cryptography

Zhonghai Lu, Xinyu Wang, Yuxiang Fu, 2022, 2022 IEEE International Symposium on Circuits and Systems (ISCAS).

Inference Time Reduction of Deep Neural Networks on Embedded Devices: A Case Study

Seyed Morteza Nabavinejad, Zhonghai Lu, Masoumeh Ebrahimi, 2022, 2022 25th Euromicro Conference on Digital System Design (DSD).

Accelerating Non-Negative Matrix Factorization on Embedded FPGA with Hybrid Logarithmic Dot-Product Approximation

Zhonghai Lu, A. García-Ortiz, Yizhi Chen, 2022, 2022 IEEE 15th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC).

Network-on-Chip Assembler Language

Axel Jantsch, Zhonghai Lu, Zhonghai Lu, 2003 .

COSMO: CO-Simulation with MATLAB and OMNeT++ for Indoor Wireless Networks

Zhi Zhang, Zhonghai Lu, Qiang Chen, 2010, 2010 IEEE Global Telecommunications Conference GLOBECOM 2010.

A Survey of FPGA Dynamic Reconfiguration Design Methodology and Applications

Axel Jantsch, Zhonghai Lu, Ming Liu, 2012, Int. J. Embed. Real Time Commun. Syst..

Inter-process Communication Using Pipes in FPGA-Based Adaptive Computing

Axel Jantsch, Zhonghai Lu, Ming Liu, 2010, 2010 IEEE Computer Society Annual Symposium on VLSI.

FPGA-based adaptive computing for correlated multi-stream processing

Axel Jantsch, Zhonghai Lu, Ming Liu, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

NR-MPA: Non-Recovery Compression Based Multi-Path Packet-Connected-Circuit Architecture of Convolution Neural Networks Accelerator

Zhonghai Lu, Zhenmin Li, Duoli Zhang, 2019, 2019 IEEE 37th International Conference on Computer Design (ICCD).

Smilodon: An Efficient Accelerator for Low Bit-Width CNNs with Task Partitioning

Zhonghai Lu, Li Li, Wenqing Song, 2019, 2019 IEEE International Symposium on Circuits and Systems (ISCAS).

The Impact of Faults on DNNs: A Case Study

Zhonghai Lu, Masoumeh Ebrahimi, Nezam Rohbani, 2021, 2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

A Network-based System Architecture for Remote Medical Applications

Axel Jantsch, Li-Rong Zheng, Zhonghai Lu, 2007 .

iNPG: Accelerating Critical Section Access with In-network Packet Generation for NoC Based Many-Cores

Yuan Yao, Zhonghai Lu, Y. Yao, 2018, 2018 IEEE International Symposium on High Performance Computer Architecture (HPCA).

A Universal Approximation Method and Optimized Hardware Architectures for Arithmetic Functions Based on Stochastic Computing

Zhongfeng Wang, Zhonghai Lu, Yuou Qiu, 2020, IEEE Access.

Heuristics-Aided Tightness Evaluation of Analytical Bounds in Networks-on-Chip

Zhonghai Lu, Xueqian Zhao, Zhonghai Lu, 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Performance Analysis of Flow-Based Traffic Splitting Strategy on Cluster-Mesh Sensor Networks

Axel Jantsch, Zhonghai Lu, Dian Zhou, 2012, Int. J. Distributed Sens. Networks.

Modeling and analysis of Rayleigh fading channels using stochastic network calculus

Axel Jantsch, Zhonghai Lu, Dian Zhou, 2011, 2011 IEEE Wireless Communications and Networking Conference.

An Efficient Accelerator for Multiple Convolutions From the Sparsity Perspective

Li Li, Yan Huang, Zhonghai Lu, 2020, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Dynamic Flow Regulation for IP Integration on Network-on-Chip

Yi Wang, Zhonghai Lu, Yi Wang, 2012, 2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip.

Design and Analysis of On-Chip Communication for Network-on-Chip Platforms

Zhonghai Lu, Zhonghai Lu, 2007 .

Cache Access Fairness in 3D Mesh-Based NUCA

Zhonghai Lu, Xiaowen Chen, Yang Guo, 2018, IEEE Access.

Mathematical formalisms for performance evaluation of networks-on-chip

Axel Jantsch, Zhonghai Lu, Abbas Eslami Kiasari, 2013, CSUR.

An Analytical Latency Model for Networks-on-Chip

Axel Jantsch, Zhonghai Lu, Abbas Eslami Kiasari, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Item-Level Indoor Localization With Passive UHF RFID Based on Tag Interaction Analysis

Zhi Zhang, Zhonghai Lu, Qiang Chen, 2014, IEEE Transactions on Industrial Electronics.

SCORE: A Novel Scheme to Efficiently Cache Overlong ECCs in NAND Flash Memory

C. Xie, You Zhou, Fei Wu, 2019, ACM Trans. Archit. Code Optim..

Lifetime adaptive ECC in NAND flash page management

Fei Wu, Meng Zhang, Zhonghai Lu, 2017, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017.

Memory Architecture and Management in an NoC Platform

Axel Jantsch, Zhonghai Lu, Xiaowen Chen, 2012 .

Memory-access aware DVFS for network-on-chip in CMPs

Yuan Yao, Zhonghai Lu, Y. Yao, 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Development and application of design transformations in ForSyDe [high level synthesis]

Axel Jantsch, Zhonghai Lu, Ingo Sander, 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

Cooperative communication for efficient and scalable all-to-all barrier synchronization on mesh-based many-core NoCs

Shuming Chen, Axel Jantsch, Yang Guo, 2014, IEICE Electron. Express.

Cooperative communication based barrier synchronization in on-chip mesh architectures

Shuming Chen, Hai Liu, Axel Jantsch, 2011, IEICE Electron. Express.

Remaining useful lifetime estimation for discrete power electronic devices using physics-informed neural network

Mingrui Liu, Zhonghai Lu, Chao Guo, 2023, Scientific reports.

RUL Estimation for Power Electronic Devices Based on LESIT Equation

Zhonghai Lu, J. Albrecht, A. Otto, 2023, 2023 Prognostics and Health Management Conference (PHM).

Modeling and Power Evaluation of On-Chip Router Components in Spintronics

Meikang Qiu, Xianyang Jiang, Zhonghai Lu, 2012, 2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip.

Securing IoT Space via Hardware Trojan Detection

Zhe Chen, Jian Wang, Shize Guo, 2020, IEEE Internet of Things Journal.

Three-phase time-aware energy minimization with DVFS and unrolling for Chip Multiprocessors

Meikang Qiu, Bin Wang, Zhonghai Lu, 2012, J. Syst. Archit..

Competence Networks in the Era of CPS - Lessons Learnt in the ICES Cross-Disciplinary and Multi-domain Center

Erik Herzog, Johnny Öberg, Martin Törngren, 2019, CyPhy/WESE.

Run-time Partial Reconfiguration speed investigation and architectural design space exploration

Axel Jantsch, Zhonghai Lu, Ming Liu, 2009, 2009 International Conference on Field Programmable Logic and Applications.

Scalability of network-on-chip communication architecture for 3-D meshes

Axel Jantsch, Hannu Tenhunen, Zhonghai Lu, 2009, 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip.

Analytical Evaluation of Retransmission Schemes in Wireless Sensor Networks

Axel Jantsch, Zhonghai Lu, Dian Zhou, 2009, VTC Spring 2009 - IEEE 69th Vehicular Technology Conference.

DVFS for NoCs in CMPs: A thread voting approach

Yuan Yao, Zhonghai Lu, Y. Yao, 2016, 2016 IEEE International Symposium on High Performance Computer Architecture (HPCA).

A framework for designing congestion-aware deterministic routing

Axel Jantsch, Zhonghai Lu, Abbas Eslami Kiasari, 2010, NoCArc '10.

A Heuristic Framework for Designing and Exploring Deterministic Routing Algorithm for NoCs

Axel Jantsch, Zhonghai Lu, Abbas Eslami Kiasari, 2014 .

Network on Chip Architectures

Natalie D. Enright Jerger, José Flich Cardo, C. Teuscher, 2008 .

A survey of memory architecture for 3D chip multi-processors

Axel Jantsch, Zhonghai Lu, Feng Han, 2014, Microprocess. Microsystems.

TDM Virtual-Circuit Configuration for Network-on-Chip

Axel Jantsch, Zhonghai Lu, Zhonghai Lu, 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

RoB-Router : A Reorder Buffer Enabled Low Latency Network-on-Chip Router

Zhonghai Lu, Xiangke Liao, Dezun Dong, 2018, IEEE Transactions on Parallel and Distributed Systems.

Symmetric-Mapping LUT-Based Method and Architecture for Computing XY-Like Functions

Zhonghai Lu, Wenqing Song, Yuxiang Fu, 2021, IEEE Transactions on Circuits and Systems I: Regular Papers.

A Variable-Size FFT Hardware Accelerator Based on Matrix Transposition

Shuming Chen, Zhonghai Lu, Xiaowen Chen, 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Addressing Transient and Permanent Faults in NoC With Efficient Fault-Tolerant Deflection Router

Axel Jantsch, Zhonghai Lu, Minxuan Zhang, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Characterizing the Reliability and Threshold Voltage Shifting of 3D Charge Trap NAND Flash

Zhonghai Lu, Changsheng Xie, Yifei Wang, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Real-time analysis for wormhole NoC: Revisited and revised

Fei Wu, Zhonghai Lu, Qin Xiong, 2016, 2016 International Great Lakes Symposium on VLSI (GLSVLSI).

A reconfigurable fault-tolerant deflection routing algorithm based on reinforcement learning for network-on-chip

Axel Jantsch, Zhonghai Lu, Minxuan Zhang, 2010, NoCArc '10.

Admitting and ejecting flits in wormhole-switched networks on chip

Axel Jantsch, Zhonghai Lu, Zhonghai Lu, 2007, IET Comput. Digit. Tech..

Layered Switching for Networks on Chip

Axel Jantsch, Zhonghai Lu, Ming Liu, 2007, 2007 44th ACM/IEEE Design Automation Conference.

SCORE

Fei Wu, You Zhou, Zhonghai Lu, 2018, ACM Transactions on Architecture and Code Optimization.

Buffer Optimization in Network-on-Chip Through Flow Regulation

Axel Jantsch, Zhonghai Lu, Fahimeh Jafari, 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Optimal regulation of traffic flows in networks-on-chip

Axel Jantsch, Zhonghai Lu, Fahimeh Jafari, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

Jamming-resilient multi-radio multi-channel multihop wireless network for smart grid

Meikang Qiu, Hai Su, Xiao Qin, 2011, CSIIRW '11.

Exploration of Slot Allocation for On-Chip TDM Virtual Circuits

Li Tong, Zhonghai Lu, Hua Zhang, 2009, 2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools.

Least Upper Delay Bound for VBR Flows in Networks-on-Chip with Virtual Channels

Axel Jantsch, Zhonghai Lu, Fahimeh Jafari, 2015, TODE.

Dynamic Traffic Regulation in NoC-Based Systems

Yuan Yao, Zhonghai Lu, Y. Yao, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Performance and network power evaluation of tightly mixed SRAM NUCA for 3D Multi-core Network on Chips

Axel Jantsch, Zhonghai Lu, Yuxiang Fu, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

Reducing Virtual-to-Physical address translation overhead in Distributed Shared Memory based multi-core Network-on-Chips according to data property

Shuming Chen, Axel Jantsch, Zhonghai Lu, 2013, Comput. Electr. Eng..

Supporting Distributed Shared Memory on multi-core Network-on-Chips using a dual microcoded controller

Shuming Chen, Axel Jantsch, Zhonghai Lu, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

Towards hierarchical cluster based cache coherence for large-scale network-on-chip

Zhonghai Lu, Li Li, Minglun Gao, 2009, 2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era.

Command-Triggered Microcode Execution for Distributed Shared Memory Based Multi-Core Network-on-Chips

Shuming Chen, Axel Jantsch, Yang Guo, 2015, J. Softw..

Characterizing 3D Floating Gate NAND Flash

Fei Wu, Zhonghai Lu, Qin Xiong, 2018, SIGMETRICS.

ALARM: A Location-Aware Redistribution Method to Improve 3D FG NAND Flash Reliability

Fei Wu, Zhonghai Lu, Qin Xiong, 2017, 2017 International Conference on Networking, Architecture, and Storage (NAS).

Bit-Flipping Schemes Upon MLC Flash: Investigation, Implementation, and Evaluation

Zhonghai Lu, Qiang Cao, Wenhui Zhang, 2019, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

QoS scheduling for NoCs: Strict Priority Queueing versus Weighted Round Robin

Zhonghai Lu, Qiang Dou, Yue Qian, 2010, 2010 IEEE International Conference on Computer Design.

A Configurable Hardware Architecture for Runtime Application of Network Calculus

Zhonghai Lu, Xiao Hu, Zhonghai Lu, 2021, NPC.

Evaluation of deflection routing on various NoC topologies

Axel Jantsch, Zhonghai Lu, Minxuan Zhang, 2011, 2011 9th IEEE International Conference on ASIC.

Hardware Acceleration of Multilayer Perceptron Based on Inter-Layer Optimization

Zhonghai Lu, Shenggang Chen, Zhonghai Lu, 2019, 2019 IEEE 37th International Conference on Computer Design (ICCD).

Prediction based convolution neural network acceleration: work-in-progress

Yuan Yao, Zhonghai Lu, Y. Yao, 2017, CASES.

Work-in-progress: prediction based convolution neural network acceleration

Yuan Yao, Zhonghai Lu, Y. Yao, 2017, 2017 International Conference on Compilers, Architectures and Synthesis For Embedded Systems (CASES).

A High-End Reconfigurable Computation Platform for Nuclear and Particle Physics Experiments

Axel Jantsch, Qiang Wang, Hao Xu, 2011, Computing in Science & Engineering.

ATCA-based computation platform for data acquisition and triggering in particle physics experiments

Axel Jantsch, Qiang Wang, Lu Li, 2008, 2008 International Conference on Field Programmable Logic and Applications.

Evaluation of Time Series Clustering on Embedded Sensor Platform

Zhonghai Lu, Wenyao Zhu, Zhonghai Lu, 2021, 2021 24th Euromicro Conference on Digital System Design (DSD).

A Model-Based Approach to Dynamic Self-assessment for Automated Performance and Safety Awareness of Cyber-Physical Systems

Zhonghai Lu, De-Jiu Chen, Zhonghai Lu, 2017, IMBSA.