J. Cortadella

发表

E. Pastor, J. Cortadella, O. Roig, 2001, IEEE Trans. Computers.

Hernán C. Melgratti, Ricardo J. Rodríguez, J. Gabarró, 2011 .

Identifying state coding conflicts in asynchronous system specifications using Petri net unfoldings

Luciano Lavagno, Alexandre Yakovlev, Jordi Cortadella, 1998, Proceedings 1998 International Conference on Application of Concurrency to System Design.

Coupling Technology Mapping, Logic Optimization and State Encoding for Speed-independent Circuits

Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, 1996 .

CROSSTALK NOISE AVOIDANCE IN ASYNCHRONOUS

L. Lavagno, J. Cortadella, A. Kondratyev, 2007 .

On the realization of reactive systems

J. Cortadella, J. Vargas, 2001 .

Rclp: a Novel Approach for Resource-constrained Loop Pipelining Rclp:a Novel Approach for Resource-constrained Loop Pipelining 3

J. Cortadella, S. Anchez, Ferm, 1993 .

A general model for performance optimization of sequential systems

Sachin S. Sapatnekar, Jordi Cortadella, Michael Kishinevsky, 2007, ICCAD 2007.

Decomposition of Speed-Independent Circuits

J. Cortadella, A. Kondratyev, M. Kishinevsky, 1999 .

Asynchronous Interface Speciication, Analysis and Synthesis 1 Speciication with Petri Nets 1.1 from Timing Diagrams to Petri Nets

J. Cortadella, A. Kondratyev, M. Kishinevsky, 1998 .

Coping with the variability of combinational logic delays

Luciano Lavagno, Jordi Cortadella, Alex Kondratyev, 2004, IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings..

Cover Approximations for the Synthesis of Speed-Independent Circuits

E. Pastor, J. Cortadella, O. Roig, 2007 .

A Symbolic Technique for the Efficient ATPG of Speed-Independent Circuits

E. Pastor, J. Cortadella, M. A. Peña, 2004 .

Automatic Generation Of Synchronous Test Patterns For Asynchronous Circuits

E. Pastor, J. Cortadella, O. Roig, 1997, Proceedings of the 34th Design Automation Conference.

Transistor-Level Fault Detection Based on PowerConsumptionGianluca Cornetta

J. Cortadella, Gianluca Cornetta, 1997 .

Maximum Throughput Loop Pipelining with Register Optimization Maximum Throughput Loop Pipelining with Register Optimization

J. Cortadella, S. Anchez, Ferm, 1994 .

Symbolic Petri Net AnalysisUsing Boolean

J. Cortadella, Oriol, RoigUPC, 1997 .

Synthesizing Petri nets from state-based models

Luciano Lavagno, Alexandre Yakovlev, Jordi Cortadella, 1995, ICCAD.

Decomposition of transition systems into sets of synchronizing state machines

T. Villa, J. Cortadella, Viktor Teren, 2021, 2021 24th Euromicro Conference on Digital System Design (DSD).

1 Process Windows

J. Cortadella, A. Mokhov, Alessandro de Gennaro, 2017 .

Conservative Symbolic Model-checking of Petri Nets for Speed-independent Circuit Veriication Conservative Symbolic Model-checking of Petri Nets for Speed-independent Circuit Veriication

J. Cortadella, Enric PastorJuly, 2007 .

ILP models for the synthesis of asynchronous control circuits

J. Cortadella, J. Carmona, 2003, ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486).

Static Timing Analysis

S. Sapatnekar, J. Cortadella, 2017 .

Synthesis Of Speed-independent Circuits From STG-unfolding Segment

A. Semenov, A. Yakovlev, E. Pastor, 1997, Proceedings of the 34th Design Automation Conference.

A high-level synthesis system for asynchronous circuits

E. Pastor, J. Cortadella, R. Badia, 1992 .

Static Timing Analysis

Sachin S. Sapatnekar, Jordi Cortadella, S. Sapatnekar, 2017 .

External Reviewers

Amol Bakshi, Anastasios Gounaris, Alexandru Jugravu, 2020, 2021 51st Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN).

A concurrent model for de-synchronization ( Extended version of the paper presented at the International Workshop on Logic Synthesis 2003 )

J. Cortadella, A. Kondratyev, C. Sotiriou, 2003 .

Decomposition of transition systems into sets of synchronizing Free-choice Petri Nets

T. Villa, J. Cortadella, Viktor Teren, 2022, 2022 25th Euromicro Conference on Digital System Design (DSD).

A region-based theory for state assignment in asynchronous circuits.

Luciano Lavagno, Alex Yakovlev, Jordi Cortadella, 1997 .

Buffer Placement and Sizing for High-Performance Dataflow Circuits

Paolo Ienne, Jordi Cortadella, Lana Josipović, 2020, FPGA.

RESIS: A New Methodology for Register Optimization in Software Pipelining

Jordi Cortadella, Fermín Sánchez, F. Sánchez, 1996, Euro-Par, Vol. II.

Brownian Circuits: Fundamentals

Josep Carmona, Ferdinand Peper, Jordi Cortadella, 2013, JETC.

NOTA SOBRE ANTIGÜEDAD, NACIONALISMO(S) E HISTORIOGRAFÍA: DOS ESTUDIOS DE CASO EN LAS HISTORIOGRAFÍAS VASCA Y CATALANA a note on antiquity, nationalism(s) and historiography: two case studies from the basque and catalan historiographies

J. Cortadella, A. Duplá, 2015 .

Reduced instruction buffer for RISC architectures

Jordi Cortadella, Teodor Jové, J. Cortadella, 1989, Microprocessing and Microprogramming.

Dynamic RAM for on-chip instruction caches

Jordi Cortadella, Teodor Jové, J. Cortadella, 1988, CARN.

Elastic Circuits

Josep Carmona, Jordi Cortadella, Michael Kishinevsky, 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Keynote Paper Elastic Circuits

Josep Carmona, Alexander Taubin, Jordi Cortadella, 2009 .

RTL Synthesis: From Logic Synthesis to Automatic Pipelining

Sachin S. Sapatnekar, Jordi Cortadella, Michael Kishinevsky, 2015, Proceedings of the IEEE.

RTL Synthesis: From Logic Synthesis to Automatic

Sachin S. Sapatnekar, Jordi Cortadella, Michael Kishinevsky, 2015 .

Design Automation of Real-Life Asynchronous Devices and Systems

Luciano Lavagno, Ad M. G. Peeters, Jordi Cortadella, 2007, Found. Trends Electron. Des. Autom..

Automating synthesis of asynchronous communication mechanisms

Alexandre Yakovlev, Jordi Cortadella, Fei Xia, 2005, Fifth International Conference on Application of Concurrency to System Design (ACSD'05).

Eliminating Excessive Dynamism of Dataflow Circuits Using Model Checking

J. Cortadella, Lana Josipović, Jiahui Xu, 2023, FPGA.

Formal methods for the analysis and synthesis of nanometer-scale cellular arrays

Josep Carmona, Ferdinand Peper, Jordi Cortadella, 2008, JETC.

From molecular interactions to gates: a systematic approach

J. Carmona, J. Cortadella, Y. Takada, 2006, 2006 IEEE/ACM International Conference on Computer Aided Design.

Hardware and Petri Nets: Application to Asynchronous Circuit Design

Luciano Lavagno, Alexandre Yakovlev, Jordi Cortadella, 2000, ICATPN.

Asynchronous interface specification, analysis and synthesis

Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

Combining structural and symbolic methods for the verification of concurrent systems

Jordi Cortadella, J. Cortadella, 1998, Proceedings 1998 International Conference on Application of Concurrency to System Design.

Partial order based approach to synthesis of speed-independent circuits

Luciano Lavagno, Alexandre Yakovlev, Jordi Cortadella, 1997, Proceedings Third International Symposium on Advanced Research in Asynchronous Circuits and Systems.

Symbolic Techniques for the Automatic Test Pattern Generation for Speed-Independent Circuits

Jordi Cortadella, Enric Pastor, E. Pastor, 1997 .

Maximum-Throughput Software Pipelining

Jordi Cortadella, Ferm in, J. Cortadella, 1995 .

The octahedron abstract domain

Jordi Cortadella, Robert Clarisó, R. Clarisó, 2004, Sci. Comput. Program..

Quasi-static scheduling of independent tasks for reactive systems

Luciano Lavagno, Jordi Cortadella, Alex Kondratyev, 2002, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Exact and Heuristic Allocation of MuIti-kernel Applications to Multi-FPGA Platforms

Luciano Lavagno, Mario R. Casu, Mihai T. Lazarescu, 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

Deriving Petri Nets for Finite Transition Systems

Luciano Lavagno, Alexandre Yakovlev, Jordi Cortadella, 1998, IEEE Trans. Computers.

A Symbolic Algorithm for the Synthesis of Bounded Petri Nets

Luciano Lavagno, Josep Carmona, Alexandre Yakovlev, 2008, Petri Nets.

Derivation of Non-structural Invariants of Petri Nets Using Abstract Interpretation

Enric Rodríguez-Carbonell, Jordi Cortadella, Robert Clarisó, 2005, ICATPN.

Synthesis of Asynchronous Hardware from Petri Nets

Josep Carmona, Alexandre Yakovlev, Jordi Cortadella, 2003, Lectures on Concurrency and Petri Nets.

Measuring the tolerance of self-adaptive clocks to supply voltage noise

Francisco de Borja Moll Echeto, Jordi Cortadella, Jordi Pérez Puigdemont, 2011 .

Fast Energy-Optimal Multikernel DNN-Like Application Allocation on Multi-FPGA Platforms

Luciano Lavagno, Mario R. Casu, Mihai T. Lazarescu, 2021, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

CNN-on-AWS: Efficient Allocation of Multikernel Applications on Multi-FPGA Platforms

Luciano Lavagno, Mario R. Casu, Mihai Teodor Lazarescu, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

New Region-Based Algorithms for Deriving Bounded Petri Nets

Josep Carmona, Jordi Cortadella, Michael Kishinevsky, 2010, IEEE Transactions on Computers.

Divide-and-Conquer Strategies for Process Mining

Josep Carmona, Jordi Cortadella, Michael Kishinevsky, 2009, BPM.

A Region-Based Algorithm for Discovering Petri Nets from Event Logs

Josep Carmona, Jordi Cortadella, Michael Kishinevsky, 2008, BPM.

Logic synthesis techniques for embedded control code optimization

Luciano Lavagno, Jordi Cortadella, Ellen Sentovich, 1997 .

Log-Based Simplification of Process Models

Josep Carmona, Jordi Cortadella, Javier de San Pedro, 2015, BPM.

Process Discovery Algorithms Using Numerical Abstract Domains

Josep Carmona, Jordi Cortadella, J. Cortadella, 2014, IEEE Transactions on Knowledge and Data Engineering.

Process Mining Meets Abstract Interpretation

Josep Carmona, Jordi Cortadella, J. Cortadella, 2010, ECML/PKDD.

Genet: A Tool for the Synthesis and Mining of Petri Nets

Josep Carmona, Jordi Cortadella, Michael Kishinevsky, 2009, 2009 Ninth International Conference on Application of Concurrency to System Design.

Region-based algorithms for process mining and synthesis of Petri nets

Jordi Cortadella, Michael Kishinevsky, Josep Carmona Vargas, 2009 .

Verification of Asynchronous Circuits by BDD-based Model Checking of Petri Nets

Jordi Cortadella, Enric Pastor, Oriol Roig, 1995, Application and Theory of Petri Nets.

Scheduling and resource binding for low power

Jordi Cortadella, Enric Musoll, J. Cortadella, 1995, Proceedings of the Eighth International Symposium on System Synthesis.

A mathematical formulation of the loop pipelining problem

Jordi Cortadella, Rosa Maria Badia Sala, Rosa Maria Badia Sala, 1996 .

State-Based Encoding of Large Asynchronous Controllers

Jordi Cortadella, Alberto Moreno, J. Cortadella, 2018, IEEE Access.

Verification of concurrent systems with parametric delays using octahedra

Jordi Cortadella, Robert Clarisó, R. Clarisó, 2005, Fifth International Conference on Application of Concurrency to System Design (ACSD'05).

Verification of timed circuits with symbolic delays

Jordi Cortadella, Robert Clarisó, R. Clarisó, 2004, ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753).

A mechanism for reducing the cost of branches in RISC architectures

Jordi Cortadella, Antonio Gonzalez, JoséM Llabería, 1988, Microprocess. Microprogramming.

External Reviewers

David Chisnall, Hernán C. Melgratti, Ricardo J. Rodríguez, 2020, 2021 51st Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN).

The Use of Petri Nets for the Design and Verification of Asynchronous Circuits and Systems

Luciano Lavagno, Jordi Cortadella, Michael Kishinevsky, 1998, J. Circuits Syst. Comput..

Petrify: A Tool for Manipulating Concurrent Specifications and Synthesis of Asynchronous Controllers (Special Issue on Asynchronous Circuit and System Design)

Luciano Lavagno, Alexandre Yakovlev, Alex Kondratyev, 1997 .

Combining process algebras and Petri nets for the specification and synthesis of asynchronous circuits

Jordi Cortadella, Marco A. Peña, J. Cortadella, 1996, Proceedings Second International Symposium on Advanced Research in Asynchronous Circuits and Systems.

Synthesizing Petri nets from state-based models

Luciano Lavagno, Alex Yakovlev, Jordi Cortadella, 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

Petri Net Analysis Using Boolean Manipulation

Jordi Cortadella, Enric Pastor, Rosa M. Badia, 1994, Application and Theory of Petri Nets.

Dominator-based partitioning for delay optimization

David Bañeres, Jordi Cortadella, Michael Kishinevsky, 2006, GLSVLSI '06.

Quasi-static scheduling for concurrent architectures

Luciano Lavagno, Alex Kondratyev, Yosinori Watanabe, 2003, Third International Conference on Application of Concurrency to System Design, 2003. Proceedings..

Elastic systems

Jordi Cortadella, Michael Kishinevsky, Marc Galceran Oms, 2010, Eighth ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2010).

Elasticity and Petri Nets

Josep Carmona, Jordi Cortadella, Michael Kishinevsky, 2008, Trans. Petri Nets Other Model. Concurr..

Synthesis of asynchronous controllers using integer linear programming

Josep Carmona, Jordi Cortadella, José Manuel Colom, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A Scheduling Strategy for Synchronous Elastic Designs

Josep Carmona, Jordi Cortadella, Michael Kishinevsky, 2011, Fundam. Informaticae.

Microarchitectural Transformations Using Elasticity

Jordi Cortadella, Michael Kishinevsky, Marc Galceran Oms, 2011, JETC.

Automatic microarchitectural pipelining

Jordi Cortadella, Michael Kishinevsky, Marc Galceran Oms, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

Correct-by-construction microarchitectural pipelining

Marc Galceran Oms, T. Kam, J. Cortadella, 2008, 2008 IEEE/ACM International Conference on Computer-Aided Design.

Desynchronization: Synthesis of Asynchronous Circuits From Synchronous Specifications

Luciano Lavagno, Jordi Cortadella, Alex Kondratyev, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Synthesis of synchronous elastic architectures

Jordi Cortadella, Michael Kishinevsky, Bill Grundmann, 2006, 2006 43rd ACM/IEEE Design Automation Conference.

Handshake protocols for de-synchronization

Luciano Lavagno, Jordi Cortadella, Alex Kondratyev, 2004, 10th International Symposium on Asynchronous Circuits and Systems, 2004. Proceedings..

Exploiting the locality of memory references to reduce the address bus energy

Tomás Lang, Jordi Cortadella, Enric Musoll, 1997, Proceedings of 1997 International Symposium on Low Power Electronics and Design.

SELF : Specification and design of synchronous elastic circuits

Jordi Cortadella, J. Cortadella, 2005 .

Multi-Clustering Net Model for Placement Algorithms

Jordi Cortadella, Andrey Ziyatdinov, David Baneres, 2008 .

Working-zone encoding for reducing the energy in microprocessor address buses

Tomás Lang, Jordi Cortadella, Enric Musoll, 1998, IEEE Trans. Very Large Scale Integr. Syst..

A new look at the conditions for the synthesis of speed-independent circuits

Jordi Cortadella, Enric Pastor, Oriol Roig, 1995, Proceedings. Fifth Great Lakes Symposium on VLSI.

Applications and Theory of Petri Nets 2004

Wolfgang Reisig, Jordi Cortadella, W. Reisig, 2004, Lecture Notes in Computer Science.

Symbolic Petri Net Analysis Using Boolean Manipulation

Jordi Cortadella, Enric Pastor, Oriol Roig, 1997 .

Deriving Petri Nets for Finite Transition Systems

J. Cortadella, M. Kishinevsky, Luciano Lavagno, 1998, IEEE Trans. Computers.

Multi-level clustering for clock skew optimization

Jordi Cortadella, Jonas Casanova, J. Cortadella, 2009, 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers.

Resource-Constrained Software Pipelining for High-Level Synthesis of DSP Systems

J. Cortadella, F. Sánchez, F. Sánchez, 1995 .

Fermin Sanchez, Jordi Cortadella, F. Sánchez, 1995 .

UNRET: A Transformation-based technique for software pipelining with resource constraints

Jordi Cortadella, J. Cortadella, 1994 .

Concurrency and Hardware Design

Grzegorz Rozenberg, Alex Yakovlev, Jordi Cortadella, 2002, Lecture Notes in Computer Science.

Retiming and recycling for elastic systems with early evaluation

Jordi Cortadella, Michael Kishinevsky, Marc Galceran Oms, 2009, 2009 46th ACM/IEEE Design Automation Conference.

Scheduling Synchronous Elastic Designs

Josep Carmona, Jordi Cortadella, Michael Kishinevsky, 2009, 2009 Ninth International Conference on Application of Concurrency to System Design.

Performance optimization of elastic systems using buffer resizing and buffer insertion

Jordi Cortadella, Jorge Júlvez, Dmitry Bufistov, 2008, 2008 IEEE/ACM International Conference on Computer-Aided Design.

Time elastic digital systems and Petri Nets

Jordi Cortadella, Michael Kishinevsky, J. Cortadella, 2008, 2008 8th International Conference on Application of Concurrency to System Design.

SELF : Specification and design of a synchronous elastic architecture for DSM systems

Jordi Cortadella, J. Cortadella, 2005 .

Speculation in Elastic Systems

Jordi Cortadella, Michael Kishinevsky, Marc Galceran Oms, 2009, 2009 46th ACM/IEEE Design Automation Conference.

Synchronous Elastic Circuits with Early Evaluation and Token Counterflow

Jordi Cortadella, Michael Kishinevsky, J. Cortadella, 2007, 2007 44th ACM/IEEE Design Automation Conference.

Jutge.org: Characteristics and Experiences

Enric Rodríguez-Carbonell, Josep Carmona, Salvador Roura, 2018, IEEE Transactions on Learning Technologies.

A Recursive Paradigm to Solve Boolean Relations

J. Cortadella, M. Kishinevsky, David Bañeres, 2009, IEEE Transactions on Computers.

A recursive paradigm to solve boolean relations

David Bañeres, Jordi Cortadella, Michael Kishinevsky, 2004, Proceedings. 41st Design Automation Conference, 2004..