T. Yamada

A 67 GHz fmax Lateral Bipolar Transistor with Co-silicided Base Electrode Structure on Thin Film SOI for RF Analog Applications

H. Ishiuchi, J. Matsunaga, H. Nii, 1999, 29th European Solid-State Device Research Conference.

A CMOS 40 MHz 8 b 105 mW two-step ADC

T. Yamada, N. Fukushima, N. Kumazawa, 1989, IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers.

Analysis on high-frequency characteristics of SOI lateral BJTs with self-aligned external base for 2-GHz RF applications

J. Matsunaga, H. Nii, T. Yamada, 2002 .

An experimental DRAM with a NAND-structured cell

F. Masuoka, S. Shiratake, D. Takashima, 1993, 1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

Fully-depleted FBC (floating body cell) with enlarged signal window and excellent logic process compatibility

Akihiro Nitayama, Takashi Ohsawa, K. Inoh, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..