E. Gourvest

A multi-wavelength 3D-compatible silicon photonics platform on 300mm SOI wafers for 25Gb/s applications

G. Masini, D. Gloria, R. Beneyton, 2013, 2013 IEEE International Electron Devices Meeting.

A 55 nm triple gate oxide 9 metal layers SiGe BiCMOS technology featuring 320 GHz fT / 370 GHz fMAX HBT and high-Q millimeter-wave passives

P. Chevalier, Y. Campidelli, D. Gloria, 2014, 2014 IEEE International Electron Devices Meeting.

Study of substrate orientations impact on Ultra Thin Buried Oxide (UTBOX) FDSOI High-K Metal gate technology performances

O. Faynot, G. Ghibaudo, F. Balestra, 2013 .

Experimental and Numerical Study on Silicon Die Strength and its Impact on Package Reliability

E. Gourvest, J. Luan, I. Raid, 2018, 2018 IEEE 20th Electronics Packaging Technology Conference (EPTC).