S. Dey

RT-level transformations for gate-level testability

Subhrajit Bhattacharya, Franc Brglez, S. Dey, 1993, 1993 European Conference on Design Automation with the European Event in ASIC Design.

An O(log n) VLSI implementation of a parallel sorting algorithm

Pradip K. Srimani, S. Dey, 1988, Seventh Annual International Phoenix Conference on Computers an Communications. 1988 Conference Proceedings.

Transforming control-flow intensive designs to facilitate power management

A. Raghunathan, S. Dey, G. Lakshminarayana, 1998, 1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287).

Fast parallel algorithm for all-pairs shortest path problem and its VLSI implementation

Pradip K. Srimani, S. Dey, P. Srimani, 1989 .

Prediction-Based Resource Allocation for OFDM in Wireless Channels

S. Dey, K. Prince, B. Krongold, 2005, 2005 Australian Communications Theory Workshop.