D. Hackenberg

发表

Power measurements for compute nodes: Improving sampling rates, granularity and accuracy

Thomas Ilsche, Robert Schöne, Daniel Hackenberg, 2015, 2015 Sixth International Green and Sustainable Computing Conference (IGSC).

Memory Performance and Cache Coherency Effects on an Intel Nehalem Multiprocessor System

Matthias S. Müller, Robert Schöne, Daniel Hackenberg, 2009, 2009 18th International Conference on Parallel Architectures and Compilation Techniques.

Empirical Weathering Properties of Oil in Ice and Snow

D. Hackenberg, Zhendi Wang, D. Dickins, 2009 .

Comparison of topical anesthetics without cocaine to tetracaine-adrenaline-cocaine and lidocaine infiltration during repair of lacerations: bupivacaine-norepinephrine is an effective new topical anesthetic agent.

G. A. Smith, B. J. Shields, D. Hackenberg, 1996, Pediatrics.

Comparing cache architectures and coherency protocols on x86-64 multicore SMP systems

Wolfgang E. Nagel, Daniel Hackenberg, Daniel Molka, 2009, 2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

Performance analysis of multi‐level parallelism: inter‐node, intra‐node and hardware accelerators

Guido Juckeland, Daniel Hackenberg, Holger Brunst, 2012, Concurr. Comput. Pract. Exp..

Energy Efficiency Aspects of the AMD Zen 2 Architecture

Thomas Ilsche, Robert Schöne, Daniel Hackenberg, 2021, 2021 IEEE International Conference on Cluster Computing (CLUSTER).

Towards Fine-grained Dynamic Tuning of HPC Applications on Modern Multi-Core Architectures

Robert Schöne, Daniel Hackenberg, Mohammed Sourouri, 2017, SC17: International Conference for High Performance Computing, Networking, Storage and Analysis.

Cache Coherence Protocol and Memory Performance of the Intel Haswell-EP Architecture

Wolfgang E. Nagel, Robert Schöne, Daniel Hackenberg, 2015, 2015 44th International Conference on Parallel Processing.

Energy Efficiency Features of the Intel Skylake-SP Processor and Their Impact on Performance

Thomas Ilsche, Robert Schöne, Daniel Hackenberg, 2019, 2019 International Conference on High Performance Computing & Simulation (HPCS).

Analysis of Parallel Applications on a High Performance-Low Energy Computer

Matthias S. Müller, Eduard A. Jorswieck, Wolfgang E. Nagel, 2014, Euro-Par Workshops.

Memory Performance and SPEC OpenMP Scalability on Quad-Socket x86_64 Systems

Matthias S. Müller, Robert Schöne, Daniel Hackenberg, 2011, ICA3PP.

The VampirTrace Plugin Counter Interface: Introduction and Examples

Thomas Ilsche, Robert Schöne, Ronny Tschüter, 2010, Euro-Par Workshops.

Flexible workload generation for HPC cluster efficiency benchmarking

Wolfgang E. Nagel, Robert Schöne, Daniel Hackenberg, 2012, Computer Science - Research and Development.

On-line analysis of hardware performance events for workload characterization and processor frequency scaling decisions

Robert Schöne, Daniel Hackenberg, D. Hackenberg, 2011, ICPE '11.

Detecting Memory-Boundedness with Hardware Performance Counters

Wolfgang E. Nagel, Robert Schöne, Daniel Hackenberg, 2017, ICPE.

SPEC OMP2012 - An Application Benchmark Suite for Parallel Systems Using OpenMP

Matthias S. Müller, Robert Henschel, Daniel Hackenberg, 2012, IWOMP.

Memory Performance of AMD EPYC Rome and Intel Cascade Lake SP Server Processors

T. Ilsche, D. Hackenberg, R. Schöne, 2022, ICPE.

An Energy Efficiency Feature Survey of the Intel Haswell Processor

Thomas Ilsche, Robert Schöne, Daniel Hackenberg, 2015, 2015 IEEE International Parallel and Distributed Processing Symposium Workshop.

Power measurement techniques on standard compute nodes: A quantitative comparison

Wolfgang E. Nagel, Thomas Ilsche, Robert Schöne, 2013, 2013 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS).

Business Strategy, IT Management and Business Value - a tripartite interaction?

Heiko Gewald, Daniel Hackenberg, Andy Weeger, 2015, AMCIS.

Characterizing the energy consumption of data transfers and arithmetic operations on x86−64 processors

Matthias S. Müller, Robert Schöne, Daniel Hackenberg, 2010, International Conference on Green Computing.

Combining Instrumentation and Sampling for Trace-Based Application Performance Analysis

Thomas Ilsche, Robert Schöne, Daniel Hackenberg, 2015 .

Main memory and cache performance of intel sandy bridge and AMD bulldozer

Robert Schöne, Daniel Hackenberg, Daniel Molka, 2014, MSPC@PLDI.