H. Makiyama

发表

Impact of random telegraph noise on write stability in Silicon-on-Thin-BOX (SOTB) SRAM cells at low supply voltage in sub-0.4V regime

Nobuyuki Sugii, Masaharu Kobayashi, Toshiro Hiramoto, 2015, 2015 Symposium on VLSI Technology (VLSI Technology).

Statistical Write Stability Characterization in SRAM Cells at Low Supply Voltage

Nobuyuki Sugii, Masaharu Kobayashi, Toshiro Hiramoto, 2016, IEEE Transactions on Electron Devices.

Ultralow-voltage operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM down to 0.37 V utilizing adaptive back bias

T. Hiramoto, T. Iwamatsu, H. Oda, 2013, 2013 Symposium on VLSI Circuits.

Suppression of die-to-die delay variability of silicon on thin buried oxide (SOTB) CMOS circuits by balanced P/N drivability control with back-bias for ultralow-voltage (0.4 V) operation

K. Ishibashi, T. Iwamatsu, T. Hiramoto, 2013, 2013 IEEE International Electron Devices Meeting.

Poly/high-k/SiON gate stack and novel profile engineering dedicated for ultralow-voltage silicon-on-thin-BOX (SOTB) CMOS operation

T. Iwamatsu, T. Hiramoto, H. Oda, 2012, 2012 Symposium on VLSI Technology (VLSIT).

Novel single p+poly-Si/Hf/SiON gate stack technology on silicon-on-thin-buried-oxide (SOTB) for ultra-low leakage applications

T. Hiramoto, S. Kamohara, H. Oda, 2015, 2015 Symposium on VLSI Technology (VLSI Technology).

Thermoelectric high power generating module made by n-Ba8Al xSi46-x clathrate

H. Makiyama, M. Arita, T. Motooka, 2008 .

Low-power embedded read-only memory using atom switch and silicon-on-thin-buried-oxide transistor

H. Hada, N. Banno, T. Sakamoto, 2015 .

Design consideration of 0.4V-operation SOTB MOSFET for super low power application

T. Iwamatsu, H. Oda, Y. Inoue, 2011, 2011 International Meeting for Future of Electron Devices.

Ultralow-voltage design and technology of silicon-on-thin-buried-oxide (SOTB) CMOS for highly energy efficient electronics in IoT era

Hideharu Amano, Kazutoshi Kobayashi, Kimiyoshi Usami, 2014, 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers.

A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14µA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology

Hideharu Amano, Duc-Hung Le, Cong-Kha Pham, 2014, 2014 IEEE COOL Chips XVII.

Comprehensive analysis of low-frequency noise variability components in bulk and fully depleted silicon-on-insulator metal–oxide–semiconductor field-effect transistor

Tomohiro Yamashita, Keiichi Maekawa, Shiro Kamohara, 2018 .

Ultra-low power and ultra-low voltage devices and circuits for IoT applications

T. Saraya, T. Hiramoto, S. Kamohara, 2016, 2016 IEEE Silicon Nanoelectronics Workshop (SNW).