K. Shimizu

Direct Measurement of Correlation Between SRAM Noise Margin and Individual Cell Transistor Variability by Using Device Matrix Array

K. Takeuchi, T. Hiramoto, T. Saraya, 2011, IEEE Transactions on Electron Devices.

Origin of “current-onset voltage” variability in scaled MOSFETs

T. Hiramoto, S. Inaba, T. Mizutani, 2010, 2010 Silicon Nanoelectronics Workshop.

Transport in ultra-thin-body SOI and silicon nanowire MOSFETs

T. Hiramoto, G. Tsutsui, K. Shimizu, 2007, 2007 International Semiconductor Device Research Symposium.

Characteristic modulation of silicon MOSFETs and single electron transistors with a movable gate electrode

T. Saraya, T. Hiramoto, H. Toshiyoshi, 2008, 2008 IEEE Silicon Nanoelectronics Workshop.

Improvement of static noise margin in SRAM by post-fabrication self-convergence technique

T. Sakurai, T. Saraya, T. Hiramoto, 2009, 2009 International Semiconductor Device Research Symposium.

Threshold Voltage Dependence of Threshold Voltage Variability in Intrinsic Channel Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistors with Ultrathin Buried Oxide

T. Hiramoto, K. Shimizu, A. T. Putra, 2010 .

Threshold-Voltage Control of AC Performance Degradation-Free FD SOI MOSFET With Extremely Thin BOX Using Variable Body-Factor Scheme

T. Hiramoto, T. Nagumo, K. Shimizu, 2007, IEEE Transactions on Electron Devices.

Experimental study of mobility in [110]- and [100]-directed multiple silicon nanowire GAA MOSFETs on (100) SOI

T. Hiramoto, Kousuke Miyaji, K. Shimizu, 2008, 2008 Symposium on VLSI Technology.