M. Heijligers

High-level synthesis scheduling and allocation using genetic algorithms

M. Heijligers, L. Cluitmans, J. Jess, 1995, Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair.

Xetal-II: A 107 GOPS, 600 mW Massively Parallel Processor for Video Scene Analysis

R.P. Kleihorst, A.A. Abbo, L. Sevat, 2008, IEEE Journal of Solid-State Circuits.

Enhancing Behavioral-Level Design Flows with Statistical Power Estimation Capabilities (Extended Version of PATMOS 2003 Paper)

E. Macii, L. Benini, M. Heijligers, 2004 .

Throughput optimization via cache partitioning for embedded multiprocessors

Anca Mariana Molnos, Sorin Cotofana, Jos T. J. van Eijndhoven, 2006, 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation.

An Embedded Low Power High Efficient Object Tracker for Surveillance Systems

Richard P. Kleihorst, Alexander Danilin, Isael Diaz, 2007, 2007 First ACM/IEEE International Conference on Distributed Smart Cameras.

A scalable architecture for LDPC decoding

J. Huisken, J. Dielissen, A. Hekstra, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Compositional, Dynamic Cache Management for Embedded Chip Multiprocessors

Anca Mariana Molnos, Sorin Cotofana, Marc J. M. Heijligers, 2008, 2008 Design, Automation and Test in Europe.

Static cache partitioning robustness analysis for embedded on-chip multi-processors

Anca Mariana Molnos, Sorin Cotofana, Jos T. J. van Eijndhoven, 2006, CF '06.

Compositional, efficient caches for a chip multi-processor

Anca Mariana Molnos, Sorin Cotofana, Jos T. J. van Eijndhoven, 2006, Proceedings of the Design Automation & Test in Europe Conference.

Compositional memory systems for multimedia communicating tasks

Anca Mariana Molnos, Sorin Cotofana, Jos T. J. van Eijndhoven, 2005, Design, Automation and Test in Europe.

Compositional memory systems for data intensive applications

Anca Mariana Molnos, Sorin Cotofana, Jos T. J. van Eijndhoven, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Overlapped Scheduling Techniques for High-Level Synthesis and Multiprocessor Realizations of DSP Algorithms

Sonia Heemstra de Groot, Sabih H. Gerez, Marc J. M. Heijligers, 1998 .

A constructive method for exploiting code motion

Jos T. J. van Eijndhoven, Luiz C. V. dos Santos, C. A. J. van Eijk, 1996, Proceedings of 9th International Symposium on Systems Synthesis.