Chau-Jie Zhan

发表

Influence of underfill materials on the reliability of coreless flip chip package

Yin-Po Hung, Tao-Chih Chang, Yu-Min Lin, 2008, Microelectron. Reliab..

Implementation of memory stacking on logic controller by using 3DIC 300mm backside TSV process integration

Chia-Hsin Lee, Ding-Ming Kwai, Tzu-Kun Ku, 2016, 2016 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA).

Printing functional substrate for flexible electronics

Chau-Jie Zhan, Wei-Han Hsiao, Cheng-Yi Shih, 2016, 2016 11th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT).

Technologies and challenges of fine-pitch backside via-last 3DIC TSV process integration and its electrical characteristics and system applications

Ding-Ming Kwai, Chien-Chou Chen, Ming-Jer Kao, 2014, Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA).

Assembly and reliability assessment of 50µm-thick chip stacking by wafer-level underfill film

Kuo-Shu Kao, Ren-Shin Cheng, Tsung-Fu Yang, 2012, 2012 7th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT).

Parameter study to the interposer stress analysis of fine pitch 3-D stack package

Tao-Chih Chang, Ching-I Chen, Chau-Jie Zhan, 2010, 2010 5th International Microsystems Packaging Assembly and Circuits Technology Conference.

Novel crosstalk modeling for multiple through-silicon-vias (TSV) on 3-D IC: Experimental validation and application to Faraday cage design

Tzong-Lin Wu, Yi-Chang Lu, Chau-Jie Zhan, 2012, 2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems.

Performance and process characteristic of glass interposer with through-glass-via(TGV)

Ren-Shin Cheng, Yu-Min Lin, Chau-Jie Zhan, 2013, 2013 IEEE International 3D Systems Integration Conference (3DIC).

Investigation of the process for glass interposer

Ren-Shin Cheng, Chau-Jie Zhan, Wei-Chung Lo, 2013, 2013 8th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT).

Wafer bumping, assembly, and reliability assessment of μbumps with 5μm pads on 10μm pitch for 3D IC integration

Kuo-Shu Kao, J. H. Lau, Chau-Jie Zhan, 2012, 2012 IEEE 62nd Electronic Components and Technology Conference.

Effect of metal finishing fabricated by electro and Electroless plating process on reliability performance of 30μm-pitch solder micro bump interconnection

John H. Lau, Chau-Jie Zhan, Shin-Yi Huang, 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.

Assembly and reliability characterization of 3D chip stacking with 30μm pitch lead-free solder micro bump interconnection

Chun-Chih Chuang, Chau-Jie Zhan, Su-Tsai Lu, 2010, 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC).

Design, fabrication, and calibration of stress sensors embedded in a TSV interposer in a 300mm wafer

Sheng-Tsai Wu, Heng-Chieh Chien, J. H. Lau, 2012, 2012 IEEE 62nd Electronic Components and Technology Conference.

Process, assembly and electromigration characteristics of glass interposer for 3D integration

Chau-Jie Zhan, Hsiang-Hung Chang, Wei-Chung Lo, 2014, 2014 IEEE 64th Electronic Components and Technology Conference (ECTC).

The performance of various solder ball under high shear speed test

Chun-Chih Chuang, Chau-Jie Zhan, Li-Cheng Shen, 2007, 2007 International Microsystems, Packaging, Assembly and Circuits Technology.

Reliability enhancements of chip-on-chip package with layout designs of microbumps

Kuo-Shu Kao, Ren-Shin Cheng, Chau-Jie Zhan, 2014 .

Effects of UBM structure/material on the reliability performance of 3D chip stacking with 30μm-pitch solder micro bump interconnections

Kuo-Shu Kao, J. H. Lau, Chau-Jie Zhan, 2012, 2012 IEEE 62nd Electronic Components and Technology Conference.

Assembly process and reliability assessment of TSV/RDL/IPD interposer with multi-chip-stacking for 3D IC integration SiP

Kuo-Shu Kao, Heng-Chieh Chien, J. H. Lau, 2012, 2012 IEEE 62nd Electronic Components and Technology Conference.

Development of fluxless chip-on-wafer bonding process for 3DIC chip stacking with 30μm pitch lead-free solder micro bumps and reliability characterization

Kuo-Shu Kao, Tai-Hong Chen, John H. Lau, 2011, 2011 IEEE 61st Electronic Components and Technology Conference (ECTC).

Bonding and electromigration of 30µm fine pitch micro-bump interconnection

Chau-Jie Zhan, Jing-Yao Chang, Tao-Chih Chang, 2009, 2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference.

Process integration and 3D chip stacking for low cost backside illuminated CMOS image sensor

Chia-Hsin Lee, Ding-Ming Kwai, Ming-Jer Kao, 2015, 2015 International Symposium on VLSI Technology, Systems and Applications.

Process integration of 3D Si interposer with double-sided active chip attachments

John H. Lau, Ming-Jer Kao, Tzu-Kun Ku, 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.

Failure mechanism of 20 μm pitch microjoint within a chip stacking architecture

Ren-Shin Cheng, Tai-Hong Chen, John H. Lau, 2011, 2011 IEEE 61st Electronic Components and Technology Conference (ECTC).

Electromigration in Ni/Sn intermetallic micro bump joint for 3D IC chip stacking

Tai-Hong Chen, John H. Lau, Chau-Jie Zhan, 2011, 2011 IEEE 61st Electronic Components and Technology Conference (ECTC).

A novel 3D IC assembly process for ultra-thin chip stacking

Ren-Shin Cheng, Chau-Jie Zhan, Cheng-Ta Ko, 2014, 2014 International Conference on Electronics Packaging (ICEP).