A. Hodjat

发表

Area-throughput trade-offs for fully pipelined 30 to 70 Gbits/s AES processors

Ingrid Verbauwhede, Alireza Hodjat, I. Verbauwhede, 2006, IEEE Transactions on Computers.

A 21.54 Gbits/s fully pipelined AES processor on FPGA

Ingrid Verbauwhede, Alireza Hodjat, I. Verbauwhede, 2004, 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.

ACM Transaction on Design Automation of Electronic Systems (TODAES) 2005 Best Paper Award

Liang-Gee Chen, Yu-Wen Huang, Ingrid Verbauwhede, 2005 .

SW co-design of a hyperelliptic curve cryptosystem using a microcode instruction set coprocessor

Ingrid Verbauwhede, Lejla Batina, Alireza Hodjat, 2006 .

Reconfigurable Architectures for Curve-Based Cryptography on Embedded Micro-Controllers

Ingrid Verbauwhede, Lejla Batina, Kazuo Sakiyama, 2006, 2006 International Conference on Field Programmable Logic and Applications.

The energy cost of secrets in ad-hoc networks

Ingrid Verbauwhede, A. Hodjat, I. Verbauwhede, 2002 .

AES-Based Security Coprocessor IC in 0.18-$muhbox m$CMOS With Resistance to Differential Power Analysis Side-Channel Attacks

S. Yang, A. Hodjat, K. Tiri, 2006, IEEE Journal of Solid-State Circuits.

Prototype IC with WDDL and Differential Routing - DPA Resistance Assessment

Patrick Schaumont, Ingrid Verbauwhede, Bo-Cheng Lai, 2005, CHES.

Testing ThumbPod: Softcore bugs are hard to find

Patrick Schaumont, Ingrid Verbauwhede, Yi Fan, 2003, Eighth IEEE International High-Level Design Validation and Test Workshop.

Design flow for HW/SW acceleration transparency in the thumbpod secure embedded system

Patrick Schaumont, Ingrid Verbauwhede, Yi Fan, 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

Hardware/Software Co-design for Hyperelliptic Curve Cryptography (HECC) on the 8051µP

Ingrid Verbauwhede, Bart Preneel, Lejla Batina, 2005, CHES.

A scalable and high performance elliptic curve processor with resistance to timing attacks

Ingrid Verbauwhede, Alireza Hodjat, David Hwang, 2005, International Conference on Information Technology: Coding and Computing (ITCC'05) - Volume II.

A 3.84 gbits/s AES crypto coprocessor with modes of operation in a 0.18-μm CMOS technology

Ingrid Verbauwhede, Bo-Cheng Lai, Kris Tiri, 2005, ACM Great Lakes Symposium on VLSI.

A hyperelliptic curve crypto coprocessor for an 8051 microcontroller

L. Batina, I. Verbauwhede, A. Hodjat, 2005, IEEE Workshop on Signal Processing Systems Design and Implementation, 2005..

HW/SW co-design of a hyperelliptic curve cryptosystem using a microcode instruction set coprocessor

L. Batina, A. Hodjat, D. Hwang, 2007, Integr..

High-throughput programmable cryptocoprocessor

Ingrid Verbauwhede, Alireza Hodjat, I. Verbauwhede, 2004, IEEE Micro.

Architectural design features of a programmable high throughput AES coprocessor

Patrick Schaumont, Ingrid Verbauwhede, Alireza Hodjat, 2004, International Conference on Information Technology: Coding and Computing, 2004. Proceedings. ITCC 2004..