K. Uchimura

A multistage delta-sigma modulator without double integration loop

Toshio Hayashi, Tadakatsu Kimura, K. Uchimura, 1986, 1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

FAM 17.5: A Single-Chip CMOS CODEC with Switched-Capacitor Filters

Atsushi Iwata, Masahiko Nakajima, Hiroyuki Kikuchi, 1980 .

Analog LSI implementation of self-learning neural networks

Takashi Morie, Yoshihito Amemiya, Kuniharu Uchimura, 1999 .

A 16-bit oversampling A-to-D conversion technology using triple-integration noise shaping

Atsushi Iwata, Y. Matsuya, K. Uchimura, 1987 .

Self-learning neural network LSI with high-resolution non-volatile analog memory

T. Morie, K. Uchimura, Osamu Fujita, 1995, Proceedings of ICNN'95 - International Conference on Neural Networks.

A high-speed digital neural network chip with low-power chain-reaction architecture

Y. Amemiya, Osamu Saito, K. Uchimura, 1992 .

Self-Learning Analog Neural Network LSI with High-Resolution Non-Volatile Analog Memory and a Partially-Serial Weight-Update Architecture

Takashi Morie, Kuniharu Uchimura, Osamu Fujita, 1997 .