Ricardo Reis

发表

Effective Method for Simultaneous Gate Sizing and $V$ th Assignment Using Lagrangian Relaxation

Guilherme Flach, Tiago Reimann, Gracieli Posser, 2014, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Design of a robust 8-bit microprocessor to soft errors

Ricardo Reis, Rodrigo Possamai Bastos, Fernanda Gusmão de Lima Kastensmidt, 2006, 12th IEEE International On-Line Testing Symposium (IOLTS'06).

An automated design methodology for layout generation targeting power leakage minimization

Ricardo Reis, Cristiano Lazzari, Adriel Ziesemer, 2009, 2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009).

Variability-aware physical design techniques

Ricardo Reis, Gustavo Wilke, 2010, 2010 11th Latin American Test Workshop.

Impact of variability effects on FinFET transistors and combinational cells

Ricardo Reis, Alexandra L. Zimpeck, 2016, 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Impact of Near-Threshold and Variability on 7nm FinFET XOR Circuits

Ricardo Reis, Cristina Meinhardt, Fabio G. Rossato G. da Silva, 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Multi-bit flip-flop usage impact on physical synthesis

Ricardo Reis, Cristiano Santos, Guilherme Godoi, 2012, 2012 25th Symposium on Integrated Circuits and Systems Design (SBCCI).

Designing fault-tolerant techniques for SRAM-based FPGAs

Luigi Carro, Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, 2004, IEEE Design & Test of Computers.

Soft-Error Probability Due to SET in Clock Tree Networks

Eduardo Chielle, Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, 2012, 2012 IEEE Computer Society Annual Symposium on VLSI.

Cell-Internal Electromigration: Analysis and Pin Placement Based Optimization

Sachin S. Sapatnekar, Gracieli Posser, Ricardo Reis, 2016, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Specification and design of an Ethernet Interface soft IP

Sergio Bampi, Ricardo Reis, Juergen Rochol, 2000, J. Braz. Comput. Soc..

Efficient Soft Error Vulnerability Analysis Using Non-intrusive Fault Injection Techniques

Ricardo Reis, Vitor V. Bandeira, Felipe Rosa, 2019, VLSI-SoC.

Transistor sizing and gate sizing using geometric programming considering delay minimization

Guilherme Flach, Gracieli Posser, Ricardo Reis, 2012, 10th IEEE International NEWCAS Conference.

Automatic layout synthesis with ASTRAN applied to asynchronous cells

Matheus T. Moreira, Ricardo Reis, Adriel Ziesemer, 2014, 2014 IEEE 5th Latin American Symposium on Circuits and Systems.

Exploring more efficient architectures for Multiple Dynamic Supply Voltage designs

Ricardo Reis, Cristina Meinhardt, Marco Terres, 2014, 2014 IEEE 5th Latin American Symposium on Circuits and Systems.

Gate mapping impact on variability robustness in FinFET technology

Ricardo Reis, Cristina Meinhardt, Leonardo H. Brendler, 2019 .

Energy efficient frame-level redundancy scrubbing technique for SRAM-based FPGAs

Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, Jorge Tonfat, 2015, 2015 NASA/ESA Conference on Adaptive Hardware and Systems (AHS).

High-performance clock mesh optimization

Guilherme Flach, Ricardo Reis, Gustavo Wilke, 2012, TODE.

Statistical and Numerical Approach for a Computer efficient circuit yield analysis

Ricardo Reis, Gilson I. Wirth, Lucas Brusamarello, 2007, VLSI-SoC.

Reliability on ARM Processors against Soft Errors by a Purely Software Approach

Eduardo Chielle, Ricardo Reis, Lucas A. Tambara, 2015, 2015 15th European Conference on Radiation and Its Effects on Components and Systems (RADECS).

Built-in aging monitoring for safety-critical applications

João Paulo Teixeira, Marcelino B. Santos, Ricardo Reis, 2009, 2009 15th IEEE International On-Line Testing Symposium.

Evaluation of Compiler Optimization Flags Effects on Soft Error Resiliency

Ricardo Reis, Luciano Ost, Guilherme E. Medeiros, 2018, 2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI).

Electromigration aware circuits by using special signal non-default routing rules

Gracieli Posser, Ricardo Reis, Lucas de Paris, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

Comparing transient-fault effects on synchronous and on asynchronous circuits

Gilles Sicard, Ricardo Reis, Rodrigo Possamai Bastos, 2009, 2009 15th IEEE International On-Line Testing Symposium.

Early evaluation of multicore systems soft error reliability using virtual platforms

Ricardo Reis, Luciano Ost, Felipe Rocha da Rosa, 2018, 2018 2nd Conference on PhD Research in Microelectronics and Electronics Latin America (PRIME-LA).

Simultaneous gate sizing and Vt assignment using Fanin/Fanout ratio and Simulated Annealing

Guilherme Flach, Tiago Reimann, Gracieli Posser, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

Pros and Cons of Schmitt Trigger Inverters to Mitigate PVT Variability on Full Adders

Ricardo Reis, Cristina Meinhardt, Alexandra L. Zimpeck, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

A New Clock Mesh Buffer Sizing Methodology for Skew and Power Reduction

Ricardo Reis, Gustavo Wilke, 2008, 2008 IEEE Computer Society Annual Symposium on VLSI.

A CAL Tool to Aid the Understanding of Logic Synthesis

Ricardo Reis, William Lautenschlager, Reginaldo Tavares, 2007, 2007 IEEE International Conference on Microelectronic Systems Education (MSE'07).

Clip Clustering for Early Lithographic Hotspot Classification

Ricardo Reis, Andre Saldanha Oliveira, Julia Casarin Puget, 2019, 2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS).

Evaluating the Impact of Process Variability and Radiation Effects on Different Transistor Arrangements

Ricardo Reis, Cristina Meinhardt, Alexandra L. Zimpeck, 2018, 2018 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC).

Design Tools and Methods for Chip Physical Design

Ricardo Reis, 2011, Multiprocessor System-on-Chip.

Modeling the impact of heavy ion on FDSOI NanoCMOS

Ricardo Reis, Andrei Vladimirescu, Walter E. Calienes Bartra, 2015, 2015 IEEE 6th Latin American Symposium on Circuits & Systems (LASCAS).

Graphite-based heat spreaders for hotspot mitigation in 3D ICs

Ricardo Reis, Pascal Vivet, Cristiano Santos, 2015, 2015 International 3D Systems Integration Conference (3DIC).

Quadratic placement with single-iteration linear system solver

Guilherme Flach, Marcelo de Oliveira Johann, Ricardo Reis, 2011, SBCCI '11.

Protecting digital circuits against hold time violation due to process variability

Ricardo Reis, Gustavo Neuberger, Gilson I. Wirth, 2009, SBCCI.

orBDDs Direct Mapping for Structured Logic Circuits

Ricardo Reis, Cristina Meinhardt, Reginaldo Tavares, 2006, 2006 13th IEEE International Conference on Electronics, Circuits and Systems.

A cells and I/O pins partitioning refinement algorithm for 3D VLSI circuits

Ricardo Reis, Sandro Sawicki, Gustavo Wilke, 2009, 2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009).

Robustness evaluation of finFET transistors under PVT variability

Ricardo Reis, Cristina Meinhardt, Alexandra L. Zimpeck, 2017, 2017 1st Conference on PhD Research in Microelectronics and Electronics Latin America (PRIME-LA).

Logic and Physical Synthesis of Cell Arrays

Ricardo Reis, Cristina Meinhardt, Reginaldo Tavares, 2007, 2007 14th IEEE International Conference on Electronics, Circuits and Systems.

UFRGSPlace: Routability driven FPGA placement algorithm for heterogeneous FPGAs

Ricardo Reis, Andre Saldanha Oliveira, Julia Casarin Puget, 2017, 2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Structuring Web course pages as Automata: revising concepts

Ricardo Reis, Júlio Henrique Araújo Pereira Machado, Paulo Blauth Menezes, 2000, RIAO.

Analyzing the influence of voltage scaling for soft errors in SRAM-based FPGAs

Luigi Carro, Fabian Vargas, Ricardo Reis, 2013, 2013 14th European Conference on Radiation and Its Effects on Components and Systems (RADECS).

Soft error rate in SRAM-based FPGAs under neutron-induced and TID effects

Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, Jorge Tonfat, 2014, 2014 15th Latin American Test Workshop - LATW.

Predictive error detection by on-line aging monitoring

João Paulo Teixeira, Marcelino B. Santos, Ricardo Reis, 2010, 2010 IEEE 16th International On-Line Testing Symposium.

Design of a soft-error robust microprocessor

Ricardo Reis, Rodrigo Possamai Bastos, Fernanda Gusmão de Lima Kastensmidt, 2009, Microelectron. J..

Geometric variability impact on 7nm Trigate combinational cells

Ricardo Reis, Cristina Meinhardt, Alexandra L. Zimpeck, 2016, 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Robustness of Sub-22nm multigate devices against physical variability

Ricardo Reis, Cristina Meinhardt, Alexandra L. Zimpeck, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

Physical design methodologies for performance predictability and manufacturability

Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, José Luís Almada Güntzel, 2004, CF '04.

A New Transistor Folding Algorithm Applied to an Automatic Full-Custom Layout Generation Tool

Ricardo Reis, Cristiano Lazzari, José Luís Almada Güntzel, 2004, PATMOS.

gem5-FIM: a flexible and scalable multicore soft error assessment framework to early reliability design space explorations

Ricardo Reis, Luciano Ost, Felipe Rocha da Rosa, 2018, 2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS).

Selected Articles from the 6th International Workshop on CMOS Variability, Salvador, Bahia, Brazil, September 1-4, 2015

Ricardo Reis, Nadine Azémard, 2016, J. Low Power Electron..

Challenges of cell selection algorithms in industrial high performance microprocessor designs

Tiago Reimann, Ricardo Reis, Cliff C. N. Sze, 2016, Integr..

Non-uniform clock mesh optimization with linear programming buffer insertion

Ricardo Reis, Gustavo Wilke, Matthew R. Guthaus, 2010, Design Automation Conference.

A frame stream controller IP

Sergio Bampi, Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

Requirements for Computer-Aided Learning from the Point of View of Electronic Design

Ricardo Reis, 2004, EDUTECH.

Evaluating the impact of environment and physical variability on the ION current of 20nm FinFET devices

Ricardo Reis, Cristina Meinhardt, Alexandra L. Zimpeck, 2014, 2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS).

Fast energy evaluation of embedded applications for many-core systems

Fernando Gehm Moraes, Ricardo Reis, Thiago Raupp da Rosa, 2014, 2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS).

Exploring area and total wirelength using a cell merging technique

Ricardo Reis, Carlos Silva Cardenas, Kevin A. Cáceres Albinagorta, 2019, 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC).

A fast and scalable fault injection framework to evaluate multi/many-core soft error reliability

Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, Felipe Rosa, 2015, 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS).

Desenvolvimento de Técnicas de Tolerância à Falhas para Componentes Programáveis por SRAM

Luigi Carro, Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, 2005, RITA.

Impact of dynamic voltage scaling and thermal factors on FinFET-based SRAM reliability

Ricardo Reis, Felipe Rosa, Luciano Ost, 2015, 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS).

An Educational Tool for Design Automation of CMOS Cells

Ricardo Reis, Cristiano Lazzari, Adriel Ziesemer, 2007, 2007 IEEE International Conference on Microelectronic Systems Education (MSE'07).

Functional verification of logic modules for a Gigabit Ethernet switch

Ricardo Reis, Gustavo Neuberger, Jorge Tonfat, 2011, 2011 12th Latin American Test Workshop (LATW).

Impact of Process Variability and Single Event Transient on FinFET Technology

Ricardo Reis, Cristina Meinhardt, Alexandra L. Zimpeck, 2019, 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC).

Overhead for independent net approach for Global Routing

Ricardo Reis, Guilherme Bontorin, Diego Tumelero, 2015, 2015 IEEE 6th Latin American Symposium on Circuits & Systems (LASCAS).

A Method for I/O Pins Partitioning Targeting 3D VLSI Circuits

Marcelo de Oliveira Johann, Ricardo Reis, Renato Fernandes Hentschke, 2006, VLSI-SoC.

On the superiority of modularity-based clustering for determining placement-relevant clusters

Mateus Fogaça, Ricardo Reis, Andrew B. Kahng, 2020, Integr..

Pros and Cons of ST and SIG FinFET Inverters for Low Power Designs

Ricardo Reis, Cristina Meinhardt, L. B. Moraes, 2020, ISCAS.

A nonlinear placement for FPGAs: The chaotic place

Ricardo Reis, Guilherme Bontorin, Elias de Almeida Ramos, 2018, 2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS).

A Design Patterns-Based Middleware for Multiprocessor Systems-on-Chip

Alexandre M. Amory, Ricardo Reis, Luciano Ost, 2018, 2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI).

Gate sizing using geometric programming

Guilherme Flach, Gracieli Posser, Ricardo Reis, 2011, 2011 IEEE Second Latin American Symposium on Circuits and Systems (LASCAS).

GR-PA: A cost pre-allocation model for global routing

Tiago Reimann, Ricardo Reis, Leandro Nunes, 2013, 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC).

A Novel full Automatic Layout Generation Strategy for Static CMOS Circuits

Ricardo Reis, Cristiano Lazzari, José Luís Almada Güntzel, 2003, VLSI-SoC.

Challenges and Emerging Technologies for System Integration beyond the End of the Roadmap of Nano-CMOS

Sergio Bampi, Ricardo Reis, 2009, VLSI-SoC.

Analyzing the Impact of Fault-Tolerance Methods in ARM Processors Under Soft Errors Running Linux and Parallelization APIs

Ricardo Reis, Fernanda Lima Kastensmidt, Felipe Rosa, 2017, IEEE Transactions on Nuclear Science.

A regular layout approach for ASICs

Ricardo Reis, Cristina Meinhardt, Reginaldo Tavares, 2006, IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI'06).

A low-cost SEE mitigation solution for soft-processors embedded in Systems on Pogrammable Chips

Ricardo Reis, Massimo Violante, Matteo Sonza Reorda, 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

FASTEN: EU-Brazil cooperation in IoT for manufacturing. The Embraer use

Ricardo Reis, Roberto Vita, Rafael Arrais, 2019 .

Leakage current analysis in static CMOS logic gates for a transistor network design approach

Guilherme Flach, Ricardo Reis, Jorge Tonfat, 2016, 2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS).

Analyzing the Impact of Frequency and Diverse Path Delays in the Time Vulnerability Factor of Master-Slave D Flip-Flops

Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, Alexandra L. Zimpeck, 2015, 2015 IEEE Computer Society Annual Symposium on VLSI.

A 3D-Via Legalization Algorithm for 3D VLSI Circuits and its Impact on Wire Length

Ricardo Reis, Renato Fernandes Hentschke, R. Reis, 2007, 2007 IEEE International Symposium on Circuits and Systems.

Exploring Multi-level Design to Mitigate Variability and Radiation Effects on 7nm FinFET Logic Cells

Ricardo Reis, Cristina Meinhardt, Alexandra L. Zimpeck, 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs

Christopher Frost, Ricardo Reis, Pascal Benoit, 2014, Microelectron. Reliab..

Process and temperature impact on single-event transients in 28nm FDSOI CMOS

Ricardo Reis, Andrei Vladimirescu, Walter E. Calienes Bartra, 2017, 2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS).

Publish-subscribe programming for a NoC-based multiprocessor system-on-chip

Alexandre M. Amory, Ricardo Reis, Luciano Ost, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

A MIPS-based ASIP to accelerate the inverse Hadamard tranform for H.264/AVC video coding

Luigi Carro, Sergio Bampi, Gracieli Posser, 2010, 2010 First IEEE Latin American Symposium on Circuits and Systems (LASCAS).

An automated methodology to fix electromigration violations on a customized design flow

Ricardo Reis, Lucas de Paris, R. Reis, 2018, 2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS).

A Mesh-Buffer Displacement Optimization Strategy

Guilherme Flach, Marcelo de Oliveira Johann, Ricardo Reis, 2010, 2010 IEEE Computer Society Annual Symposium on VLSI.

Supporting Consistency Control between Functional and Structural Views in Interface-based Design Models

Leandro Soares Indrusiak, Ricardo Reis, Manfred Glesner, 2003, FDL.

Trends on EDA for low power

Ricardo Reis, 2015, 2015 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization (NEMO).

Extensive Evaluation of Programming Models and ISAs Impact on Multicore So Error Reliability

Ricardo Reis, Luciano Ost, Vitor Bandeira, 2018, 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC).

System-level thermal modeling for 3D circuits: Characterization with a 65nm memory-on-logic circuit

Ricardo Reis, Nicolas Peltier, Pascal Vivet, 2013, 2013 IEEE International 3D Systems Integration Conference (3DIC).

A systematic approach for analyzing and optimizing cell-internal signal electromigration

Sachin S. Sapatnekar, Gracieli Posser, Ricardo Reis, 2014, 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

A Low-Cost Solution for Deploying Processor Cores in Harsh Environments

Ricardo Reis, Massimo Violante, Matteo Sonza Reorda, 2011, IEEE Transactions on Industrial Electronics.

Simultaneous gate sizing and Vth assignment using Lagrangian Relaxation and delay sensitivities

Guilherme Flach, Tiago Reimann, Gracieli Posser, 2013, 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

SET and SEU simulation toolkit for LabVIEW

Ricardo Reis, Walter Calienes Bartra, 2011, 2011 12th European Conference on Radiation and Its Effects on Components and Systems.

Reducing the number of transistors with gate clustering

Gracieli Posser, Ricardo Reis, Calebe Conceição, 2016, 2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS).

Extensive evaluation of programming models and ISAs impact on multicore soft error reliability

Ricardo Reis, Vitor V. Bandeira, Luciano Ost, 2018, DAC.

Blue Macaw: A Didactic Placement Tool Using Simulated Annealing

Marcelo de Oliveira Johann, Ricardo Reis, Renato Fernandes Hentschke, 2005, EDUTECH.

Quadratic placement for 3d circuits using z-cell shifting, 3d iterative refinement and simulated annealing

Guilherme Flach, Ricardo Reis, Renato Fernandes Hentschke, 2006, SBCCI '06.

Considering Zero-Arrival Time and Block-Arrival Time in Hierarchical Functional Timing Analysis

Ricardo Reis, José Luís Almada Güntzel, Daniel Lima Ferrão, 2006, PATMOS.

Efficient emulation of quantum circuits on classical hardware

Ricardo Reis, Calebe Conceição, R. Reis, 2015, 2015 IEEE 6th Latin American Symposium on Circuits & Systems (LASCAS).

Evaluating transient-fault effects on traditional C-element's implementations

Gilles Sicard, Ricardo Reis, Rodrigo Possamai Bastos, 2010, 2010 IEEE 16th International On-Line Testing Symposium.

Message from the general and program chairs

Leandro Soares Indrusiak, Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, 2013, ISVLSI.

Cell Selection for High-Performance Designs in an Industrial Design Flow

Tiago Reimann, Ricardo Reis, Cliff C. N. Sze, 2016, ISPD.

Designing and testing fault-tolerant techniques for SRAM-based FPGAs

Luigi Carro, Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, 2004, CF '04.

Comparing high-level modeling approaches for embedded system design

Luigi Carro, Carlos Eduardo Pereira, Leandro Buss Becker, 2005, ASP-DAC.

Cell placement on graphics processing units

Guilherme Flach, Marcelo de Oliveira Johann, Ricardo Reis, 2007, SBCCI '07.

Designing Low-Power Embedded Software for Mass-Produced Microprocessor by Using a Loop Table in On-Chip Memory

Ricardo Reis, Rodrigo Possamai Bastos, Fernanda Gusmão de Lima Kastensmidt, 2005, PATMOS.

Statistical analysis of systematic and random variability of flip-flop race immunity in 130nm and 90nm CMOS technologies

Ricardo Reis, Gustavo Neuberger, Ralf Brederlow, 2007, 2007 IFIP International Conference on Very Large Scale Integration.

A transistor sizing method applied to an automatic layout generation tool

Ricardo Reis, Cristiano Lazzari, José Luís Almada Güntzel, 2003, 16th Symposium on Integrated Circuits and Systems Design, 2003. SBCCI 2003. Proceedings..

Impact of schmitt trigger inverters on process variability robustness of 1-Bit full adders

Ricardo Reis, Cristina Meinhardt, Alexandra L. Zimpeck, 2017, 2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Soft Error Reliability Assessment of Neural Networks on Resource-constrained IoT Devices

Ricardo Reis, Luciano Ost, Geancarlo Abich, 2020, 2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Plic-Plac: a novel constructive algorithm for placement

Ricardo Reis, Renato Fernandes Hentschke, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

Power consumption in transistor networks versus in standard cells

Ricardo Reis, Gerson Scartezzini, 2011, 2011 18th IEEE International Conference on Electronics, Circuits, and Systems.

SET susceptibility estimation of clock tree networks from layout extraction

Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, Raul Chipana, 2012, 2012 13th Latin American Test Workshop (LATW).

TOC-BISR: A Self-Repair Scheme for Memories in Embedded Systems

Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, Gustavo Neuberger, 2005, IESS.

Unbalacing the I/O Pins Partitioning for Minimizing Inter-Tier Vias in 3D VLSI Circuits

Marcelo de Oliveira Johann, Ricardo Reis, Renato Fernandes Hentschke, 2006, 2006 13th IEEE International Conference on Electronics, Circuits and Systems.

Reusing smaller optimized FFT blocks for the realization of larger power-efficient radix-2 FFTs

Ricardo Reis, Sidinei Ghissoni, Eduardo Costa, 2015, 2015 25th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS).

Power consumption & reliability in NanoCMOS

Ricardo Reis, 2011, 2011 11th IEEE International Conference on Nanotechnology.

Logical Core Algorithm: Improving Global Placement

Marcelo de Oliveira Johann, Ricardo Reis, Felipe Pinto, 2010, 2010 IEEE Computer Society Annual Symposium on VLSI.

Measuring the impact of voltage scaling for soft errors in SRAM-based FPGAs from a designer perspective

Luigi Carro, Fabian Vargas, Ricardo Reis, 2014, 19th Annual International Mixed-Signals, Sensors, and Systems Test Workshop Proceedings.

Design at high level of a robust 8-bit microprocessor to soft errors by using only standard gates

Ricardo Reis, Rodrigo Possamai Bastos, Fernanda Gusmão de Lima Kastensmidt, 2006, SBCCI '06.

SET susceptibility analysis in buffered tree clock distribution networks

Ricardo Reis, Fernanda Lima Kastensmidt, Raul Chipana, 2011, 2011 12th European Conference on Radiation and Its Effects on Components and Systems.

An On-board Data-Handling Computer for Deep-Space Exploration Built Using Commercial-Off-the-Shelf SRAM-Based FPGAs

Ricardo Reis, Massimo Violante, Matteo Sonza Reorda, 2009, 2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

Using electromagnetic emanations for variability characterization in Flash-based FPGAs

Ricardo Reis, Pascal Benoit, Lionel Torres, 2013, 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Using Machine Learning Techniques to Evaluate Multicore Soft Error Reliability

Ricardo Reis, Luciano Ost, Rafael Garibotti, 2019, IEEE Transactions on Circuits and Systems I: Regular Papers.

Exploiting memory allocations in clusterised many-core architectures

Ricardo Reis, Abdoulaye Gamatié, Gilles Sassatelli, 2019, IET Comput. Digit. Tech..

Synthesis of an 8051-Like Micro-Controller Tolerant to Transient Faults

Luigi Carro, Ricardo Reis, Marcelo Lubaszewski, 2000, J. Electron. Test..

A novel scheme to reduce short-circuit power in mesh-based clock architectures

Ricardo Reis, Gustavo Wilke, Renan Fonseca, 2008, SBCCI '08.

A yield-driven regular layout synthesis

Ricardo Reis, Cristina Meinhardt, 2013, 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Aging and voltage scaling impacts under neutron-induced soft error rate in SRAM-based FPGAs

Christopher Frost, Ricardo Reis, Pascal Benoit, 2014, 2014 19th IEEE European Test Symposium (ETS).

Multiple fault injection platform for SRAM-based FPGA based on ground-level radiation experiments

Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, Jorge Tonfat, 2015, 2015 16th Latin-American Test Symposium (LATS).

Maze Routing Steiner Trees With Delay Versus Wire Length Tradeoff

Marcelo de Oliveira Johann, Ricardo Reis, Renato Fernandes Hentschke, 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A set of Virtual Instruments to simulate radiation effects in CMOS circuits

Ricardo Reis, Walter Calienes Bartra, 2014, 2014 IEEE International Instrumentation and Measurement Technology Conference (I2MTC) Proceedings.

Global routing congestion reduction with cost allocation look-ahead

Ricardo Reis, Leandro Nunes, 2013, 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI).

Low-sensitivity to process variations aging sensor for automotive safety-critical applications

João Paulo Teixeira, Marcelino B. Santos, Ricardo Reis, 2010, 2010 28th VLSI Test Symposium (VTS).

Quadratic timing objectives for incremental timing-driven placement optimization

Mateus Fogaça, Guilherme Flach, Marcelo de Oliveira Johann, 2016, 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Posicionamento de Circuitos 3D Considerando o Planejamento de 3D-Vias

Marcelo de Oliveira Johann, Ricardo Reis, Renato Fernandes Hentschke, 2012, RITA.

Exploration of Techniques to Assess Soft Errors in Multicore Architectures

Isadora Oliveira, Ricardo Reis, Luciano Ost, 2019, 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC).

Evaluation of SET under Process Variability on FinFET Multi-level Design

Ricardo Reis, Cristina Meinhardt, Alexandra L. Zimpeck, 2019, 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC).

Revisiting automated physical synthesis of high-performance clock networks

Ricardo Reis, Gustavo Wilke, Matthew R. Guthaus, 2013, TODE.

Incremental timing optimization for automatic layout generation

Ricardo Reis, José Luís Almada Güntzel, Cristiano Santos, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Investigating parallel TMR approaches and thread disposability in Linux

Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, Felipe Rosa, 2017, 2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Gate sizing and threshold voltage assignment for high performance microprocessor designs

Tiago Reimann, Ricardo Reis, Cliff C. N. Sze, 2015, The 20th Asia and South Pacific Design Automation Conference.

Efficient area and power multiplication part of FFT based on twiddle factor decomposition

José C. Monteiro, Ricardo Reis, Sidinei Ghissoni, 2012, 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012).

Efficient timing closure with a transistor level design flow

Lorena Anghel, Ricardo Reis, Cristiano Lazzari, 2007, 2007 IFIP International Conference on Very Large Scale Integration.

Statistical Analysis of Normality of Systematic and Random Variability of Flip-Flop Race Immunity in 130nm and 90nm CMOS Technologies

Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, Gustavo Neuberger, 2007, VLSI-SoC.

Reducing the signal Electromigration effects on different logic gates by cell layout optimization

Sachin S. Sapatnekar, Gracieli Posser, Ricardo Reis, 2015, 2015 IEEE 6th Latin American Symposium on Circuits & Systems (LASCAS).

Design automation of transistor networks, a new challenge

Ricardo Reis, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

Path planning aware of soil compaction for steep slope vineyards

Ricardo Reis, Pedro Costa, Raul Morais, 2018, 2018 IEEE International Conference on Autonomous Robot Systems and Competitions (ICARSC).

3D-Via Driven Partitioning for 3D VLSI Integrated Circuits

Marcelo de Oliveira Johann, Ricardo Reis, Gustavo Wilke, 2010, CLEI Electron. J..

Evaluation of multicore systems soft error reliability using virtual platforms

Ricardo Reis, Simon Davidmann, Felipe Rosa, 2017, 2017 15th IEEE International New Circuits and Systems Conference (NEWCAS).

A New Nonlinear Global Placement for FPGAs: The Chaotic Place

Ricardo Reis, Guilherme Bontorin, Elias de Almeida Ramos, 2019, IEEE Transactions on Circuits and Systems I: Regular Papers.

A New Transistor-Level Layout Generation Strategy for Static CMOS Circuits

Ricardo Reis, Cristiano Lazzari, Cristiano Santos, 2006, 2006 13th IEEE International Conference on Electronics, Circuits and Systems.

Process Variability Impact on the SET Response of FinFET Multi-level Design

Ricardo Reis, Cristina Meinhardt, Alexandra L. Zimpeck, 2019, VLSI-SoC.

Energy-efficient Level Shifter topology

Marcelo de Oliveira Johann, Ricardo Reis, Marco Terres, 2015, 2015 25th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS).

Memory-efficient multithreaded code generation from Simulink for heterogeneous MPSoC

Luigi Carro, Ahmed Amine Jerraya, Ricardo Reis, 2007, Des. Autom. Embed. Syst..

Reliability on ARM Processors Against Soft Errors Through SIHFT Techniques

Eduardo Chielle, Ricardo Reis, Jorge Tonfat, 2016, IEEE Transactions on Nuclear Science.

Using TSVs for thermal mitigation in 3D circuits: Wish and truth

Ricardo Reis, Pascal Vivet, François de Crecy, 2014, 2014 International 3D Systems Integration Conference (3DIC).

Comparing high-performance cells in CMOS bulk and FinFET technologies

Ricardo Reis, Cristina Meinhardt, 2014, 2014 IEEE 5th Latin American Symposium on Circuits and Systems.

3D-Vias Aware Quadratic Placement for 3D VLSI Circuits

Guilherme Flach, Ricardo Reis, Renato Fernandes Hentschke, 2007, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07).

The Fidelity Property of the Elmore Delay Model in actual comparison of routing algorithms

Tiago Reimann, Marcelo de Oliveira Johann, Ricardo Reis, 2010, 2010 IEEE International Conference on Computer Design.

Measuring the effectiveness of symmetric and asymmetric transistor sizing for Single Event Transient mitigation in CMOS 90nm technologies

Ricardo Reis, Fernanda Lima Kastensmidt, Gilson Wirth, 2009, 2009 10th Latin American Test Workshop.

Exploring the Impact of Soft Errors on NoC-based Multiprocessor Systems

Fernando Gehm Moraes, Sergio Bampi, Ricardo Reis, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

Analyzing the impact of using pthreads versus OpenMP under fault injection in ARM Cortex-A9 dual-core

Ricardo Reis, Luciano Ost, Gennaro S. Rodrigues, 2016, 2016 16th European Conference on Radiation and Its Effects on Components and Systems (RADECS).

Path Planning approach with the extraction of Topological Maps from Occupancy Grid Maps in steep slope vineyards

Ricardo Reis, Pedro Costa, Luís Santos, 2019, 2019 IEEE International Conference on Autonomous Robot Systems and Competitions (ICARSC).

Reducing the amount of transistors by gate merging

Ricardo Reis, Guilherme Bontorin, Luciana Mendes da Silva, 2018, 2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS).

Impact on performance, power, area and wirelength using electromigration-aware cells

Sachin S. Sapatnekar, Gracieli Posser, Ricardo Reis, 2015, 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS).

Instruction-driven timing CPU model for efficient embedded software development using OVP

Ricardo Reis, Gilles Sassatelli, Felipe Rosa, 2013, 2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS).

Extending FreeRTOS to support dynamic and distributed mapping in multiprocessor systems

Fernando Gehm Moraes, Ricardo Reis, Luciano Ost, 2016, 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Simulation of SET faults in a voltage controlled oscillator

Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, Walter E. Calienes Bartra, 2012, 2012 13th Latin American Test Workshop (LATW).

Gate Sizing Minimizing Delay and Area

Guilherme Flach, Gracieli Posser, Ricardo Reis, 2011, 2011 IEEE Computer Society Annual Symposium on VLSI.

Combining fault tolerance and serialization effort to improve yield in 3D Networks-on-Chip

Debora Matos, Altamiro Amadeu Susin, Ricardo Reis, 2013, 2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS).

Non-intrusive Fault Injection Techniques for Efficient Soft Error Vulnerability Analysis

Ricardo Reis, Luciano Ost, Vitor Bandeira, 2019, 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC).

Asynchronous circuits as alternative for mitigation of long-duration transient faults in deep-submicron technologies

Gilles Sicard, Ricardo Reis, Rodrigo Possamai Bastos, 2010, Microelectron. Reliab..

A design flow for physical synthesis of digital cells with ASTRAN

Matheus T. Moreira, Ricardo Reis, Adriel Ziesemer, 2014, GLSVLSI '14.

A cell clustering technique to reduce transistor count

Ricardo Reis, Calebe Conceição, Gisell Moura, 2017, 2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Circuit-Level Techniques to Mitigate Process Variability and Soft Errors in FinFET Designs

Ricardo Reis, Cristina Meinhardt, Alexandra L. Zimpeck, 2019, 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC).

Process variability in FinFET standard cells with different transistor sizing techniques

Gracieli Posser, Ricardo Reis, Cristina Meinhardt, 2015, 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS).

Design and verification of a layer-2 Ethernet MAC classification engine for a Gigabit Ethernet switch

Ricardo Reis, Jorge Tonfat, J. Tonfat, 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.

Reducing the Power Consumption in Networks-on-Chip through Data Coding Schemes

Leandro Soares Indrusiak, Fernando Gehm Moraes, Ricardo Reis, 2007, 2007 14th IEEE International Conference on Electronics, Circuits and Systems.

Radix-2 Decimation in Time (DIT) FFT implementation based on a Matrix-Multiple Constant multiplication approach

Levent Aksoy, José C. Monteiro, Ricardo Reis, 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.

Finding placement-relevant clusters with fast modularity-based clustering

Andrew B. Kahng, Mateus Fogaça, Ricardo Reis, 2019, ASP-DAC.

VLSI-SoC: An Enduring Tradition

Ricardo Reis, Manfred Glesner, 2017, VLSI-SoC.

On the Evolution of Remote Laboratories for Prototyping Digital Electronic Systems

Leandro Soares Indrusiak, Ricardo Reis, Manfred Glesner, 2007, IEEE Transactions on Industrial Electronics.

Redundant robot localization system based in wireless sensor network

Armando Sousa, Ricardo Reis, Raul Morais, 2018, 2018 IEEE International Conference on Autonomous Robot Systems and Competitions (ICARSC).

Power dissipation effects on 28nm FPGA-based System on Chips neutron sensitivity

Gabriel L. Nazar, Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, 2014, 2014 22nd International Conference on Very Large Scale Integration (VLSI-SoC).

Process Variability Challenges for Radiation Mitigation Techniques on 16nm

Ricardo Reis, Cristina Meinhardt, Samuel Presa Toledo, 2019, 2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS).

A novel approach to reduce power consumption in level shifter for Multiple Dynamic Supply Voltage

Ricardo Reis, Cristina Meinhardt, Marco Terres, 2013, 2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS).

Design of very deep pipelined multipliers for FPGAs

Sergio Bampi, Flávio Rech Wagner, Marcelo de Oliveira Johann, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Reducing fine-grain communication overhead in multithread code generation for heterogeneous MPSoC

Luigi Carro, Ahmed Amine Jerraya, Ricardo Reis, 2007, SCOPES '07.

A Transistor Placement Technique Using Genetic Algorithm and Analytical Programming

Lorena Anghel, Ricardo Reis, Cristiano Lazzari, 2005, VLSI-SoC.

Impact of dynamic voltage scaling and thermal factors on SRAM reliability

Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, Felipe Rosa, 2015, Microelectron. Reliab..

Analyzing the Effectiveness of a Frame-Level Redundancy Scrubbing Technique for SRAM-based FPGAs

Ricardo Reis, Heather M. Quinn, Paolo Rech, 2015, IEEE Transactions on Nuclear Science.

A tool to simulate optical lithography in nanoCMOs

Guilherme Flach, Ricardo Reis, Tania Mara Ferla, 2014, 2014 IEEE International Instrumentation and Measurement Technology Conference (I2MTC) Proceedings.

An automatic technique for optimizing Reed-Solomon codes to improve fault tolerance in memories

Ricardo Reis, Fernanda Gusmão de Lima Kastensmidt, Gustavo Neuberger, 2005, IEEE Design & Test of Computers.

Process Variability Mitigation

Ricardo Reis, Cristina Meinhardt, Laurent Artola, 2021, Mitigating Process Variability and Soft Errors at Circuit-Level for FinFETs.

Circuit-Level Mitigation Approaches

Ricardo Reis, Cristina Meinhardt, Laurent Artola, 2021 .

Applying Lightweight Soft Error Mitigation Techniques to Embedded Mixed Precision Deep Neural Networks

Ricardo Reis, Luciano Ost, Rafael Garibotti, 2021, IEEE Transactions on Circuits and Systems I: Regular Papers.

Mitigating Process Variability and Soft Errors at Circuit-Level for FinFETs

Ricardo Reis, Cristina Meinhardt, Laurent Artola, 2021 .

Reliability Challenges in FinFETs

Ricardo Reis, Cristina Meinhardt, Laurent Artola, 2021 .